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| author | Wesley Chalmers <Wesley.Chalmers@amd.com> | 2022-11-04 15:19:22 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-02-08 17:15:21 -0500 |
| commit | 8f0d304d21b351d65e8c434c5399a40231876ba1 (patch) | |
| tree | 5047ea17a6dc7eb140a0f720c64b3d32a734b3d2 /drivers/gpu/drm/amd/display/dc/dcn10 | |
| parent | 4f1b5e739dfd1edde33329e3f376733a131fb1ff (diff) | |
| download | linux-stable-8f0d304d21b351d65e8c434c5399a40231876ba1.tar.gz linux-stable-8f0d304d21b351d65e8c434c5399a40231876ba1.tar.bz2 linux-stable-8f0d304d21b351d65e8c434c5399a40231876ba1.zip | |
drm/amd/display: Do not commit pipe when updating DRR
[WHY]
DRR and Pipe cannot be updated on
the same frame, or else underflow will
occur.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h index 88ac5f6f4c96..0b37bb0e184b 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h @@ -519,7 +519,8 @@ struct dcn_optc_registers { type OTG_CRC_DATA_STREAM_COMBINE_MODE;\ type OTG_CRC_DATA_STREAM_SPLIT_MODE;\ type OTG_CRC_DATA_FORMAT;\ - type OTG_V_TOTAL_LAST_USED_BY_DRR; + type OTG_V_TOTAL_LAST_USED_BY_DRR;\ + type OTG_DRR_TIMING_DBUF_UPDATE_PENDING; #define TG_REG_FIELD_LIST_DCN3_2(type) \ type OTG_H_TIMING_DIV_MODE_MANUAL; |