diff options
author | Max Tseng <max.tseng@amd.com> | 2023-09-08 15:31:33 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2023-09-26 17:00:22 -0400 |
commit | 5fad7d8cc4d425524f39cc7202a8211184ac4657 (patch) | |
tree | 22542f5962bdea75567df0e35c13bea492636649 /drivers/gpu/drm/amd/display | |
parent | b308e6f3af1cb27dd710ff781c0637fa34de4eed (diff) | |
download | linux-stable-5fad7d8cc4d425524f39cc7202a8211184ac4657.tar.gz linux-stable-5fad7d8cc4d425524f39cc7202a8211184ac4657.tar.bz2 linux-stable-5fad7d8cc4d425524f39cc7202a8211184ac4657.zip |
drm/amd/display: augment display clock in dc_cap structure
[Why]
Allow dc report maximum display clock possible at vmin
Reviewed-by: Wayne Lin <wayne.lin@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Max Tseng <max.tseng@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c | 2 |
3 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 562b56bd1c30..0e0978561804 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -270,6 +270,7 @@ struct dc_caps { uint16_t subvp_vertical_int_margin_us; bool seamless_odm; uint32_t max_v_total; + uint32_t max_disp_clock_khz_at_vmin; uint8_t subvp_drr_vblank_start_margin_us; }; diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c index c637d8b6095a..d8fa229d78ce 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c @@ -1914,6 +1914,8 @@ static bool dcn314_resource_construct( dc->caps.color.mpc.ogam_rom_caps.hlg = 0; dc->caps.color.mpc.ocsc = 1; + dc->caps.max_disp_clock_khz_at_vmin = 694000; + /* Use pipe context based otg sync logic */ dc->config.use_pipe_ctx_sync_logic = true; diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c index 67ff19d4116d..10ae1b3da751 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c @@ -1832,6 +1832,8 @@ static bool dcn35_resource_construct( dc->caps.color.mpc.ogam_rom_caps.hlg = 0; dc->caps.color.mpc.ocsc = 1; + dc->caps.max_disp_clock_khz_at_vmin = 669154; + /* Use pipe context based otg sync logic */ dc->config.use_pipe_ctx_sync_logic = true; /* read VBIOS LTTPR caps */ |