summaryrefslogtreecommitdiffstats
path: root/arch/arm64/kernel/cpuinfo.c
Commit message (Expand)AuthorAgeFilesLines
* Merge branch 'for-next/mte' into for-next/coreWill Deacon2020-10-021-0/+1
|\
| * arm64: mte: CPU feature detection and initial sysreg configurationVincenzo Frascino2020-09-031-1/+1
* | arm64/cpuinfo: Define HWCAP name arrays per their actual bit definitionsAnshuman Khandual2020-09-111-85/+92
|/
* arm64/cpuinfo: Remove unnecessary fallthrough annotationGustavo A. R. Silva2020-08-271-1/+0
* treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2020-08-231-1/+1
* arm64: Reserve HWCAP2_MTE as (1 << 18)Catalin Marinas2020-07-241-0/+1
* Merge branch 'for-next/bti' into for-next/coreWill Deacon2020-05-281-0/+1
|\
| * arm64: Basic Branch Target Identification supportDave Martin2020-03-161-0/+1
| |
| \
*-. \ Merge branches 'for-next/acpi', 'for-next/bpf', 'for-next/cpufeature', 'for-n...Will Deacon2020-05-281-2/+6
|\ \ \ | |_|/ |/| |
| | * arm64/cpuinfo: Move device_initcall() near cpuinfo_regs_init()Anshuman Khandual2020-05-041-2/+2
| |/ |/|
| * arm64/cpuinfo: Add ID_MMFR4_EL1 into the cpuinfo_arm64 contextAnshuman Khandual2020-05-211-0/+1
| * arm64/cpufeature: Introduce ID_MMFR5 CPU registerAnshuman Khandual2020-05-211-0/+1
| * arm64/cpufeature: Introduce ID_DFR1 CPU registerAnshuman Khandual2020-05-211-0/+1
| * arm64/cpufeature: Introduce ID_PFR2 CPU registerAnshuman Khandual2020-05-211-0/+1
|/
* Merge branch 'for-next/rng' into for-next/coreWill Deacon2020-01-221-0/+1
|\
| * arm64: Implement archrandom.h for ARMv8.5-RNGRichard Henderson2020-01-221-0/+1
* | arm64: Introduce ID_ISAR6 CPU registerAnshuman Khandual2020-01-151-0/+1
* | arm64: cpufeature: Export matrix and other features to userspaceSteven Price2020-01-151-0/+7
|/
* arm64: cpufeature: Fix typos in commentShaokun Zhang2019-10-251-1/+1
* arm64: constify icache_policy_str[]Mark Rutland2019-08-131-1/+1
* Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2019-07-081-0/+2
|\
| * arm64: Expose FRINT capabilities to userspaceMark Brown2019-06-251-0/+1
| * arm64: Expose ARMv8.5 CondM capability to userspaceMark Brown2019-06-251-0/+1
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner2019-06-191-11/+1
|/
* arm64: Expose SVE2 features for userspaceDave Martin2019-04-231-0/+6
* arm64: Expose DC CVADP to userspaceAndrew Murray2019-04-161-0/+1
* arm64: HWCAP: add support for AT_HWCAP2Andrew Murray2019-04-161-1/+1
* arm64: add basic pointer authentication supportMark Rutland2018-12-131-0/+2
* arm64: Add support for SB barrier and patch in over DSB; ISB sequencesWill Deacon2018-12-061-0/+1
* arm64: cpufeature: Fix handling of CTR_EL0.IDC fieldSuzuki K Poulose2018-10-161-1/+9
* arm64: cpufeature: Detect SSBS and advertise to userspaceWill Deacon2018-09-141-0/+1
* arm64: Expose Arm v8.4 featuresSuzuki K Poulose2018-03-191-0/+4
* arm64: v8.4: Support for new floating point multiplication instructionsDongjiu Geng2018-01-051-0/+1
* arm64/sve: Detect SVE and activate runtime supportDave Martin2017-11-031-0/+1
* arm64/sve: Probe SVE capabilities and usable vector lengthsDave Martin2017-11-031-0/+6
* arm64: Expose support for optional ARMv8-A featuresSuzuki K Poulose2017-10-111-0/+5
* arm64: Expose DC CVAP to userspaceRobin Murphy2017-08-091-0/+1
* arm64: cpuinfo: constify attribute_group structures.Arvind Yadav2017-06-301-1/+1
* arm64: v8.3: Support for weaker release consistencySuzuki K Poulose2017-03-201-0/+1
* arm64: v8.3: Support for complex number instructionsSuzuki K Poulose2017-03-201-0/+1
* arm64: v8.3: Support for Javascript conversion instructionSuzuki K Poulose2017-03-201-0/+1
* arm64: cache: Identify VPIPT I-cachesWill Deacon2017-03-201-0/+4
* arm64: cache: Merge cachetype.h into cache.hWill Deacon2017-03-201-1/+1
* arm64: cache: Remove support for ASID-tagged VIVT I-cachesWill Deacon2017-03-201-6/+3
* arm64: cpuinfo: remove I-cache VIPT aliasing detectionWill Deacon2017-03-201-13/+10
* arm64: Advertise support for Rounding double multiply instructionsSuzuki K Poulose2017-01-121-0/+1
* arm64: cpufeature: Expose CPUID registers by emulationSuzuki K Poulose2017-01-121-0/+1
* arm64/cpuinfo: Convert to hotplug state machineAnna-Maria Gleixner2016-12-021-28/+9
* arm64/cpuinfo: Make hotplug notifier symmetricAnna-Maria Gleixner2016-12-021-1/+2
* arm64: Rearrange CPU errata workaround checksSuzuki K Poulose2016-09-091-2/+0
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-14 07:53:37 +0000