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* x86/CPU/AMD: Remove amd_get_nb_id()Yazen Ghannam2020-11-191-2/+2
* x86/amd_nb: Add AMD family 17h model 60h PCI IDsAlexander Monakov2020-05-221-0/+5
* x86/amd_nb, char/amd64-agp: Use amd_nb_num() accessorBorislav Petkov2020-03-171-3/+1
* x86/amd_nb: Add Family 19h PCI IDsYazen Ghannam2020-01-161-0/+3
* x86/amd_nb: Add PCI device IDs for family 17h, model 70hMarcel Bocu2019-09-031-0/+3
* Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2019-07-081-1/+1
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| * x86/amd_nb: Make hygon_nb_misc_ids staticYueHaibing2019-06-141-1/+1
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 477Thomas Gleixner2019-06-191-1/+2
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* x86/amd_nb: Add PCI device IDs for family 17h, model 30hWoods, Brian2018-11-071-0/+6
* x86/amd_nb: Add support for newer PCI topologiesWoods, Brian2018-11-071-6/+38
* hwmon/k10temp, x86/amd_nb: Consolidate shared device IDsWoods, Brian2018-11-071-2/+1
* x86/pci, x86/amd_nb: Add Hygon Dhyana support to PCI and northbridgePu Wen2018-09-271-8/+37
* x86/amd_nb: Check vendor in AMD-only functionsPu Wen2018-09-271-0/+4
* x86/amd_nb: Add support for Raven Ridge CPUsGuenter Roeck2018-05-131-0/+6
* x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_steppingJia Zhang2018-02-151-1/+1
* x86/cpu/AMD: Apply the Erratum 688 fix when the BIOS doesn'tBorislav Petkov2017-10-221-0/+41
* x86/amd_nb: Add SMN and Indirect Data Fabric access for AMD Fam17hYazen Ghannam2016-11-161-2/+106
* x86/amd_nb: Add Fam17h Data Fabric as "Northbridge"Yazen Ghannam2016-11-161-0/+5
* x86/amd_nb: Make all exports EXPORT_SYMBOL_GPLYazen Ghannam2016-11-161-11/+13
* x86/amd_nb: Make amd_northbridges internal to amd_nb.cYazen Ghannam2016-11-161-8/+25
* Merge branch 'x86-headers-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2016-08-011-1/+1
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| * x86/kernel: Audit and remove any unnecessary uses of module.hPaul Gortmaker2016-07-141-1/+1
* | x86/amd_nb: Clean up init pathBorislav Petkov2016-07-011-23/+14
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* x86/amd_nb: Fix boot crash on non-AMD systemsBorislav Petkov2016-07-011-2/+2
* x86/cpu: Get rid of compute_unit_idBorislav Petkov2016-03-291-4/+2
* x86/gart: Check for GART support before accessing GART registersAravind Gopalakrishnan2015-05-061-3/+1
* x86, amd_nb: Add device IDs to NB tables for F15h M60hAravind Gopalakrishnan2014-10-201-0/+2
* Merge tag 'edac_for_3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds2014-04-011-0/+2
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| * amd64_edac: Add support for newer F16h modelsAravind Gopalakrishnan2014-02-271-0/+2
* | x86/AMD/NB: Fix amd_set_subcaches() parameter typeDan Carpenter2014-01-251-1/+1
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* x86, amd_nb: Clarify F15h, model 30h GART and L3 supportAravind Gopalakrishnan2013-08-121-2/+11
* Merge branch 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2013-04-301-1/+2
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| * amd64_edac: Add Family 16h supportAravind Gopalakrishnan2013-04-191-1/+2
* | x86: Constify a few itemsJan Beulich2013-03-111-1/+1
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* Merge branch 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2012-07-221-0/+1
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| * x86, amd_nb: Export model 0x10 and later PCI idBorislav Petkov2012-06-071-0/+1
* | x86/debug: Add KERN_<LEVEL> to bare printks, convert printks to pr_<level>Joe Perches2012-06-061-4/+6
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* Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jb...Linus Torvalds2012-01-111-0/+31
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| * x86/PCI: amd: factor out MMCONFIG discoveryBjorn Helgaas2012-01-061-0/+31
* | x86: Simplify code by removing a !SMP #ifdefs from 'struct cpuinfo_x86'Kevin Winchester2011-12-211-6/+2
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* x86, amd-nb: Rename CPU PCI id define for F4Borislav Petkov2011-03-311-1/+1
* Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds2011-03-171-1/+1
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| * PCI: Rename CPU PCI id defineBorislav Petkov2011-03-171-1/+1
* | x86, amd-nb: Misc cleanliness fixesBorislav Petkov2011-03-031-8/+10
* | x86: Adjust section placement in AMD northbridge related codeJan Beulich2011-02-101-3/+4
* | x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUsHans Rosenfeld2011-02-071-0/+63
* | x86, amd: Extend AMD northbridge caching code to support "Link Control" devicesHans Rosenfeld2011-01-261-2/+9
* | x86, amd: Enable L3 cache index disable on family 0x15Hans Rosenfeld2011-01-261-0/+3
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* x86: Use PCI method for enabling AMD extended config space before MSR methodJan Beulich2011-01-111-0/+7
* x86, cacheinfo: Cleanup L3 cache index disable supportHans Rosenfeld2010-11-181-0/+10