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path: root/drivers/clk/renesas/r8a779f0-cpg-mssr.c
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* clk: renesas: r8a779f0: Fix Ethernet Switch clocksGeert Uytterhoeven2022-11-161-2/+2
* clk: renesas: r8a779f0: Fix SCIF parent clocksWolfram Sang2022-11-081-4/+4
* clk: renesas: r8a779f0: Fix HSCIF parent clocksWolfram Sang2022-11-081-4/+4
* clk: renesas: r8a779f0: Add SASYNCPER internal clockGeert Uytterhoeven2022-10-261-3/+5
* clk: renesas: r8a779f0: Fix SD0H clock nameGeert Uytterhoeven2022-10-261-1/+1
* clk: renesas: r8a779f0: Add Ethernet Switch clocksYoshihiro Shimoda2022-10-171-0/+2
* clk: renesas: r8a779f0: Add MSIOF clocksWolfram Sang2022-08-291-0/+4
* clk: renesas: r8a779f0: Add TMU and parent SASYNC clocksWolfram Sang2022-08-221-0/+10
* clk: renesas: r8a779f0: Add CMT clocksWolfram Sang2022-08-151-0/+4
* clk: renesas: r8a779f0: Add SDH0 clockWolfram Sang2022-08-151-1/+2
* clk: renesas: r8a779f0: Add HSCIF clocksWolfram Sang2022-06-171-0/+4
* clk: renesas: r8a779f0: Add PCIe clocksYoshihiro Shimoda2022-06-171-0/+2
* clk: renesas: r8a779f0: Add Z0 and Z1 clock supportGeert Uytterhoeven2022-06-171-0/+2
* clk: renesas: r8a779f0: Add SDHI0 clockWolfram Sang2022-06-131-0/+1
* clk: renesas: r8a779f0: Add thermal clockWolfram Sang2022-06-131-0/+1
* clk: renesas: rcar-gen4: Add CLK_TYPE_GEN4_PLL4Yoshihiro Shimoda2022-04-291-10/+10
* clk: renesas: r8a779f0: Add UFS clockYoshihiro Shimoda2022-04-251-0/+1
* clk: renesas: Move RPC core clocksGeert Uytterhoeven2022-04-131-3/+6
* clk: renesas: r8a779f0: Add PFC clockGeert Uytterhoeven2022-02-221-0/+1
* clk: renesas: r8a779f0: Add I2C clocksGeert Uytterhoeven2022-02-221-0/+6
* clk: renesas: r8a779f0: Add WDT clockGeert Uytterhoeven2022-02-221-0/+9
* clk: renesas: r8a779f0: Fix RSW2 clock dividerGeert Uytterhoeven2022-02-221-1/+1
* clk: renesas: r8a779f0: Add SYS-DMAC clocksYoshihiro Shimoda2022-01-241-0/+2
* clk: renesas: cpg-mssr: Add support for R-Car S4-8Yoshihiro Shimoda2021-12-081-0/+183