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path: root/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
Commit message (Expand)AuthorAgeFilesLines
* clk: tegra: clk-dfll: Add suspend and resume supportSowjanya Komatineni2019-11-111-0/+1
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-10/+1
* clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' staticWei Yongjun2019-02-181-1/+1
* Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...Arnd Bergmann2019-02-151-16/+504
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| * clk: tegra: dfll: add CVB tables for Tegra210Joseph Lo2019-02-061-0/+426
| * clk: tegra: dfll: CVB calculation alignment with the regulatorJoseph Lo2019-02-061-5/+44
| * clk: tegra: dfll: registration for multiple SoCsPeter De Schrijver2019-02-061-11/+34
* | clk: tegra: dfll: Fix a potential Oop in remove()Dan Carpenter2019-01-091-1/+3
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* clk: tegra: dfll: Fix drvdata overwriting issueNicolin Chen2017-11-011-7/+5
* clk: tegra: dfll: Use builtin_platform_driver to simplify the codeWei Yongjun2016-11-101-6/+1
* clk: tegra: make clk-tegra124-dfll-fcpu explicitly non-modularPaul Gortmaker2016-11-041-14/+2
* clk: tegra: dfll: Reformat CVB frequency tableThierry Reding2016-04-281-25/+25
* clk: tegra: dfll: Properly clean up on failure and removalThierry Reding2016-04-281-4/+27
* clk: tegra: dfll: Make code more comprehensibleThierry Reding2016-04-281-6/+5
* clk: tegra: dfll: Reference CVB table instead of copying dataThierry Reding2016-04-281-14/+9
* clk: tegra: Add Tegra124 DFLL clocksource platform driverTuomas Tynkkynen2015-07-161-0/+166