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* clk: renesas: rcar-gen3: Set state when registering SD clocksNiklas Söderlund2019-12-131-12/+4
* clk: qcom: gcc-msm8998: Disable halt check of UFS clocksBjorn Andersson2019-12-131-3/+3
* clk: renesas: r8a77995: Correct parent clock of DUGeert Uytterhoeven2019-12-131-2/+2
* clk: renesas: r8a77990: Correct parent clock of DUTakeshi Kihara2019-12-131-2/+2
* clk: qcom: Fix MSM8998 resetsJeffrey Hugo2019-12-131-19/+19
* clk: sunxi-ng: h3/h5: Fix CSI_MCLK parentChen-Yu Tsai2019-12-131-1/+1
* clk: meson: meson8b: fix the offset of vid_pll_dco's N valueMartin Blumenstingl2019-12-131-1/+1
* clk: mediatek: Drop more __init markings for driver probeStephen Boyd2019-12-131-2/+2
* clk: mediatek: Drop __init from mtk_clk_register_cpumuxes()Stephen Boyd2019-12-131-4/+4
* clk: meson: Fix GXL HDMI PLL fractional bits widthNeil Armstrong2019-12-131-1/+7
* clk: rockchip: fix I2S1 clock gate register for rk3328Katsuhiro Suzuki2019-12-131-1/+1
* clk: rockchip: fix rk3188 sclk_mac_lbtest parameter orderingHeiko Stuebner2019-12-131-2/+2
* clk: rockchip: fix rk3188 sclk_smc gate dataFinley Xiao2019-12-131-2/+2
* clk: sunxi-ng: a64: Fix gate bit of DSI DPHYJagan Teki2019-12-131-1/+1
* clk: stm32mp1: parent clocks updateGabriel Fernandez2019-12-051-5/+5
* clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocksGabriel Fernandez2019-12-051-5/+7
* clk: stm32mp1: fix mcu divider tableGabriel Fernandez2019-12-051-1/+1
* clk: stm32mp1: fix HSI divider flagGabriel Fernandez2019-12-051-2/+2
* clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated()Alexandre Belloni2019-12-051-18/+10
* clk: at91: fix update bit maps on CFG_MOR writeEugen Hristev2019-12-051-1/+1
* clk: ti: clkctrl: Fix failed to enable error with double udelay timeoutTony Lindgren2019-12-051-2/+3
* clk: ti: dra7-atl-clock: Remove ti_clk_add_alias callPeter Ujfalusi2019-12-051-6/+0
* clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18Colin Ian King2019-12-051-1/+1
* clk: sunxi: Fix operator precedence in sunxi_divs_clk_setupNathan Chancellor2019-12-051-2/+2
* clk: at91: avoid sleeping earlyAlexandre Belloni2019-12-052-5/+20
* clk: samsung: exynos5420: Preserve PLL configuration during suspend/resumeMarek Szyprowski2019-12-051-0/+6
* clk: samsung: exynos5433: Fix error pathsMarek Szyprowski2019-12-051-2/+12
* clk: meson: gxbb: let sar_adc_clk_div set the parent clock rateMartin Blumenstingl2019-12-051-0/+1
* clk: tegra20: Turn EMC clock gate into dividerDmitry Osipenko2019-12-011-10/+26
* clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clockIcenowy Zheng2019-12-011-1/+6
* clk: at91: audio-pll: fix audio pmc typeAlexandre Belloni2019-12-011-1/+1
* clk: mmp2: fix the clock id for sdh2_clk and sdh3_clkLubomir Rintel2019-12-011-2/+2
* clk: tegra: Fixes for MBIST work aroundJoseph Lo2019-12-011-3/+3
* clk: samsung: Use clk_hw API for calling clk framework from clk notifiersMarek Szyprowski2019-11-242-4/+4
* clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420Joonyoung Shim2019-11-241-2/+1
* clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resumeMarek Szyprowski2019-11-241-1/+1
* clk: keystone: Enable TISCI clocks if K3_ARCHNishanth Menon2019-11-242-1/+2
* clk: sunxi-ng: h6: fix PWM gate/reset offsetRongyi Chen2019-11-201-1/+1
* clk: boston: unregister clks on failure in clk_boston_setup()Yi Wang2019-11-061-5/+13
* clk: sprd: add missing kfreeChunyan Zhang2019-10-071-0/+2
* clk: at91: select parent if main oscillator or bypass is enabledEugen Hristev2019-10-071-3/+7
* clk: qcom: gcc-sdm845: Use floor ops for sdcc clksStephen Boyd2019-10-071-2/+2
* clk: renesas: cpg-mssr: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven2019-10-071-1/+2
* clk: renesas: mstp: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven2019-10-071-1/+2
* clk: zx296718: Don't reference clk_init_data after registrationStephen Boyd2019-10-071-60/+49
* clk: sprd: Don't reference clk_init_data after registrationStephen Boyd2019-10-071-2/+3
* clk: sirf: Don't reference clk_init_data after registrationStephen Boyd2019-10-071-4/+8
* clk: actions: Don't reference clk_init_data after registrationStephen Boyd2019-10-071-2/+3
* clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocksIcenowy Zheng2019-10-071-0/+3
* clk: qoriq: Fix -Wunused-const-variableNathan Huckleberry2019-10-071-1/+1
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-21 22:46:17 +0000