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path: root/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
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* drm/amd/display: Fix DP2.0 timing syncIlya Bakoulin2023-09-261-0/+1
* drm/amd/display: Use DTBCLK as refclk instead of DPREFCLKAustin Zheng2023-08-071-1/+2
* drm/amd/display: Don't apply FIFO resync W/A if rdivider = 0Alvin Lee2023-07-251-1/+4
* drm/amd/display: Trigger DIO FIFO resync on commit streams for DCN32Saaem Rizvi2023-06-091-16/+5
* drm/amd/display: fix wrong index used in dccg32_set_dpstreamclkHersen Wu2023-03-221-2/+1
* drm/amd/display: Implement workaround for writing to OTG_PIXEL_RATE_DIV registerSaaem Rizvi2023-03-221-0/+22
* drm/amd/display: Fix DTBCLK disable requests and SRC_SEL programmingAlvin Lee2022-11-291-5/+1
* drm/amd/display: Avoid setting pixel rate divider to N/ATaimur Hassan2022-11-231-1/+3
* drm/amd/display: Avoid unnecessary pixel rate divider programmingTaimur Hassan2022-09-291-0/+53
* drm/amd/display: make some functions staticJiapeng Chong2022-09-141-4/+4
* drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programmingGeorge Shen2022-08-291-4/+4
* drm/amd/display: Fix dpstreamclk programmingMichael Strauss2022-07-251-1/+2
* drm/amd/display: Switch to correct DTO on HDMIChris Park2022-07-051-0/+4
* drm/amdgpu/display: make some functions staticAlex Deucher2022-06-061-1/+1
* drm/amd/display: Implement DTBCLK ref switching on dcn32Alvin Lee2022-06-031-0/+2
* drm/amd/display: add new pixel rate programmingJun Lei2022-06-031-0/+1
* drm/amd/display: Use DTBCLK for valid pixel clockEric Bernstein2022-06-031-6/+14
* drm/amd/display: Add dependant changes for DCN32/321Aurabindo Pillai2022-06-031-26/+19
* drm/amd/display: add DCN32/321 specific files for Display CoreAurabindo Pillai2022-06-031-0/+299