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* drm/msm/dpu: Add SM7150 supportDanila Tikhonov2024-06-231-0/+335
| | | | | | | | | | | Add definitions for the display hardware used on the Qualcomm SM7150 platform. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/599129/ Link: https://lore.kernel.org/r/20240614215855.82093-3-danila@jiaxyga.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dp: assign correct DP controller ID to x1e80100 interface tableKuogee Hsieh2024-03-291-3/+31
| | | | | | | | | | | | | | | | | | | | | | | | At current x1e80100 interface table, interface #3 is wrongly connected to DP controller #0 and interface #4 wrongly connected to DP controller #2. Fix this problem by connect Interface #3 to DP controller #0 and interface #4 connect to DP controller #1. Also add interface #6, #7 and #8 connections to DP controller to complete x1e80100 interface table. Changs in V3: -- add v2 changes log Changs in V2: -- add x1e80100 to subject -- add Fixes Fixes: e3b1f369db5a ("drm/msm/dpu: Add X1E80100 support") Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585549/ Link: https://lore.kernel.org/r/1711741586-9037-1-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
* drm/msm/dpu: Add X1E80100 supportAbel Vesa2024-02-221-0/+449
| | | | | | | | | | | | | Add definitions for the display hardware used on the Qualcomm X1E80100 platform. Co-developed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579075/ Link: https://lore.kernel.org/r/20240220-x1e80100-display-v4-4-971afd9de861@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: add support for SDM660 and SDM630 platformsDmitry Baryshkov2024-02-192-0/+516
| | | | | | | | | | | | | | | Bring in hardware support for the SDM660 and SDM630 platforms, which belong to the same DPU generation as MSM8998. Note, by default these platforms are still handled by the MDP5 driver unless the `msm.prefer_mdp5=false' parameter is provided. Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/577507/ Link: https://lore.kernel.org/r/20240208-fd-migrate-mdp5-v4-4-945d08ef3fa8@linaro.org
* drm/msm/dpu: introduce separate wb2_format arrays for rgb and yuvAbhinav Kumar2023-12-147-14/+14
| | | | | | | | | | | | | | | | | | | | | | | Lets rename the existing wb2_formats array wb2_formats_rgb to indicate that it has only RGB formats and can be used on any chipset having a WB block. Introduce a new wb2_formats_rgb_yuv array to the catalog to indicate support for YUV formats to writeback in addition to RGB. Chipsets which have support for CDM block will use the newly added wb2_formats_rgb_yuv array. changes in v3: - change type of wb2_formats_rgb/wb2_formats_rgb_yuv to u32 to fix checkpatch warnings Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571837/ Link: https://lore.kernel.org/r/20231212205254.12422-15-quic_abhinavk@quicinc.com [DB: fixed newer catalog entries] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: add cdm blocks to sm8250 dpu_hw_catalogAbhinav Kumar2023-12-141-0/+1
| | | | | | | | | | | | | | Add CDM blocks to the sm8250 dpu_hw_catalog to support YUV format output from writeback block. changes in v2: - re-use the cdm definition from sc7280 Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571819/ Link: https://lore.kernel.org/r/20231212205254.12422-7-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: add cdm blocks to sc7280 dpu_hw_catalogAbhinav Kumar2023-12-141-0/+1
| | | | | | | | | | | | | | | | | | | Add CDM blocks to the sc7280 dpu_hw_catalog to support YUV format output from writeback block. changes in v3: - change the comment from sub-blk to clk for CDM changes in v2: - remove explicit zero assignment for features - move sc7280_cdm to dpu_hw_catalog from the sc7280 catalog file as its definition can be re-used Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571818/ Link: https://lore.kernel.org/r/20231212205254.12422-6-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: enable writeback on SM8450Dmitry Baryshkov2023-12-141-0/+18
| | | | | | | | | Enable WB2 hardware block, enabling writeback support on this platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/570187/ Link: https://lore.kernel.org/r/20231203002743.1291956-4-dmitry.baryshkov@linaro.org
* drm/msm/dpu: enable writeback on SM8350Dmitry Baryshkov2023-12-141-0/+18
| | | | | | | | | Enable WB2 hardware block, enabling writeback support on this platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/570188/ Link: https://lore.kernel.org/r/20231203002743.1291956-3-dmitry.baryshkov@linaro.org
* Merge remote-tracking branch 'drm-misc/drm-misc-next' into msm-nextRob Clark2023-12-101-0/+1
|\ | | | | | | | | | | | | | | | | | | Backmerge drm-misc-next to pick up some dependencies for drm/msm patches, in particular: https://patchwork.freedesktop.org/patch/570219/?series=127251&rev=1 https://patchwork.freedesktop.org/series/123411/ Signed-off-by: Rob Clark <robdclark@chromium.org>
| * drm/msm/dpu: Add missing safe_lut_tbl in sc8280xp catalogBjorn Andersson2023-11-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During USB transfers on the SC8280XP __arm_smmu_tlb_sync() is seen to typically take 1-2ms to complete. As expected this results in poor performance, something that has been mitigated by proposing running the iommu in non-strict mode (boot with iommu.strict=0). This turns out to be related to the SAFE logic, and programming the QOS SAFE values in the DPU (per suggestion from Rob and Doug) reduces the TLB sync time to below 10us, which means significant less time spent with interrupts disabled and a significant boost in throughput. Fixes: 4a352c2fc15a ("drm/msm/dpu: Introduce SC8280XP") Cc: stable@vger.kernel.org Suggested-by: Doug Anderson <dianders@chromium.org> Suggested-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Tested-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Steev Klimaszewski <steev@kali.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/565094/ Link: https://lore.kernel.org/r/20231030-sc8280xp-dpu-safe-lut-v1-1-6d485d7b428f@quicinc.com Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
* | drm/msm/dpu: correct clk bit for WB2 blockDmitry Baryshkov2023-12-063-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On sc7280 there are two clk bits for WB2: vbif_cli and clk_ctrl. While programming the VBIF params of WB, the driver should be toggling the former bit, while the sc7180_mdp, sc7280_mdp and sm8250_mdp structs list the latter one. Correct that to ensure proper programming sequence for WB2 on these platforms. Fixes: 255f056181ac ("drm/msm/dpu: sc7180: add missing WB2 clock control") Fixes: 3ce166380567 ("drm/msm/dpu: add writeback support for sc7280") Fixes: 53324b99bd7b ("drm/msm/dpu: add writeback blocks to the sm8250 DPU catalog") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Paloma Arellano <quic_parellan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/570185/ Link: https://lore.kernel.org/r/20231203002437.1291595-1-dmitry.baryshkov@linaro.org
* | drm/msm/dpu: add support for SM8650 DPUNeil Armstrong2023-12-051-0/+457
| | | | | | | | | | | | | | | | | | | | Add DPU version 10.0 support for the SM8650 platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/564975/ Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-mdss-v2-5-43f1887c82b8@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* | drm/msm/dpu: Add hw revision 4.1 (SDM670)Richard Acayan2023-12-051-0/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Snapdragon 670 uses similar clocks (with one frequency added) to the Snapdragon 845 but reports DPU revision 4.1. Add support for this DPU with configuration from the Pixel 3a downstream kernel. Since revision 4.0 is SDM845, reuse some configuration from its catalog entry. Link: https://android.googlesource.com/kernel/msm/+/368478b0ae76566927a2769a2bf24dfe7f38bb78/arch/arm64/boot/dts/qcom/sdm670-sde.dtsi Signed-off-by: Richard Acayan <mailingradian@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562965/ Link: https://lore.kernel.org/r/20231017021805.1083350-14-mailingradian@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* | drm/msm/gpu: drop duplicating VIG feature masksDmitry Baryshkov2023-12-0510-25/+25
| | | | | | | | | | | | | | | | | | | | After folding QSEED3LITE and QSEED4 feature bits into QSEED3_COMPATIBLE several VIG feature masks became equal. Drop these duplicates. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/570107/ Link: https://lore.kernel.org/r/20231201234234.2065610-11-dmitry.baryshkov@linaro.org
* | drm/msm/dpu: deduplicate some (most) of SSPP sub-blocksDmitry Baryshkov2023-12-0516-95/+95
| | | | | | | | | | | | | | | | | | | | As we have dropped the variadic parts of SSPP sub-blocks declarations, deduplicate them now, reducing memory cruft. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/570112/ Link: https://lore.kernel.org/r/20231201234234.2065610-7-dmitry.baryshkov@linaro.org
* | drm/msm/dpu: Drop unused qseed_type from catalog dpu_capsMarijn Suijten2023-12-0514-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SSPP scaler subblk is responsible for reporting its version (via the .id field, feature bits on the parent SSPP block, and since recently also from reading a register to supersede a read-but-unset version field in the catalog), leaving this global qseed_type field logically unused. Remove this dead code to lighten the catalog and bringup-overhead. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/570109/ Link: https://lore.kernel.org/r/20231201234234.2065610-4-dmitry.baryshkov@linaro.org
* | drm/msm/dpu: populate SSPP scaler block versionDmitry Baryshkov2023-12-053-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function _dpu_hw_sspp_setup_scaler3() passes and dpu_hw_setup_scaler3() uses scaler_blk.version to determine in which way the scaler (QSEED3) block should be programmed. However up to now we were not setting this field. Set it now, splitting the vig_sblk data which has different version fields. Reported-by: Marijn Suijten <marijn.suijten@somainline.org> Fixes: 9b6f4fedaac2 ("drm/msm/dpu: Add SM6125 support") Fixes: 27f0df03f3ff ("drm/msm/dpu: Add SM6375 support") Fixes: 3186acba5cdc ("drm/msm/dpu: Add SM6350 support") Fixes: efcd0107727c ("drm/msm/dpu: add support for SM8550") Fixes: 4a352c2fc15a ("drm/msm/dpu: Introduce SC8280XP") Fixes: 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog") Fixes: 100d7ef6995d ("drm/msm/dpu: add support for SM8450") Fixes: 3581b7062cec ("drm/msm/disp/dpu1: add support for display on SM6115") Fixes: dabfdd89eaa9 ("drm/msm/disp/dpu1: add inline rotation support for sc7280") Fixes: f3af2d6ee9ab ("drm/msm/dpu: Add SC8180x to hw catalog") Fixes: 94391a14fc27 ("drm/msm/dpu1: Add MSM8998 to hw catalog") Fixes: af776a3e1c30 ("drm/msm/dpu: add SM8250 to hw catalog") Fixes: 386fced3f76f ("drm/msm/dpu: add SM8150 to hw catalog") Fixes: b75ab05a3479 ("msm:disp:dpu1: add scaler support on SC7180 display") Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/570098/ Link: https://lore.kernel.org/r/20231201234234.2065610-2-dmitry.baryshkov@linaro.org
* | drm/msm/dpu: Add missing safe_lut_tbl in sc8180x catalogBjorn Andersson2023-12-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to SC8280XP, the misconfigured SAFE logic causes rather significant delays in __arm_smmu_tlb_sync(), resulting in poor performance for things such as USB. Introduce appropriate SAFE values for SC8180X to correct this. Fixes: f3af2d6ee9ab ("drm/msm/dpu: Add SC8180x to hw catalog") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reported-by: Anton Bambura <jenneron@postmarketos.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/569840/ Link: https://lore.kernel.org/r/20231130-sc8180x-dpu-safe-lut-v1-1-a8a6bbac36b8@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* | drm/msm/dpu: enable smartdma on sm8350Abhinav Kumar2023-12-021-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | To support high resolutions on sm8350, enable smartdma in its catalog. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/556561/ Link: https://lore.kernel.org/r/20230908193314.27008-1-quic_abhinavk@quicinc.com [DB: rebased on top of msm-next] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* | drm/msm/dpu: enable SmartDMA on SM8450Dmitry Baryshkov2023-12-021-8/+8
|/ | | | | | | | | | Enable the SmartDMA / multirect support on the SM8450 platform to support higher resoltion modes. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/561590/ Link: https://lore.kernel.org/r/20231009165627.2691015-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: enable writeback on SM8550Neil Armstrong2023-10-161-0/+16
| | | | | | | | | Enable WB2 hardware block, enabling writeback support on this platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562328/ Signed-off-by: Rob Clark <robdclark@chromium.org>
* drm/msm/dpu: sm8550: remove unused VIG and DMA clock controls entriesNeil Armstrong2023-10-161-20/+0
| | | | | | | | | | The SM8550 has the SSPP clk_ctrl in the SSPP registers, remove the duplicate clock controls from the MDP top. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562330/ Signed-off-by: Rob Clark <robdclark@chromium.org>
* drm/msm/dpu: shift IRQ indices by 1Dmitry Baryshkov2023-10-0916-97/+0
| | | | | | | | | | | | In order to simplify IRQ declarations, shift IRQ indices by 1. This makes 0 the 'no IRQ' value. Thanks to this change, we do no longer have to explicitly set the 'no interrupt' fields in catalog structures. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/550938/ Link: https://lore.kernel.org/r/20230802100426.4184892-9-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: fix DSC 1.2 block lengthsDmitry Baryshkov2023-08-035-19/+19
| | | | | | | | | | | | | | | All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length. This includes the common block itself, enc subblocks and some empty space around. Change that to pass 0x4 instead, the length of common register block itself. Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets") Reported-by: Ryan McCann <quic_rmccann@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/550998/ Link: https://lore.kernel.org/r/20230802183655.4188640-1-dmitry.baryshkov@linaro.org
* drm/msm/dpu: increase memtype count to 16 for sm8550Jonathan Marek2023-08-031-2/+2
| | | | | | | | | | | | | | | | sm8550 has 16 vbif clients. This fixes the extra 2 clients (DMA4/DMA5) not having their memtype initialized. This fixes DMA4/DMA5 planes not displaying correctly. Fixes: efcd0107727c ("drm/msm/dpu: add support for SM8550") Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Patchwork: https://patchwork.freedesktop.org/patch/550968/ Link: https://lore.kernel.org/r/20230802134900.30435-1-jonathan@marek.ca [DB: fixed the Fixes tag] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: drop UBWC configurationDmitry Baryshkov2023-08-0216-103/+0
| | | | | | | | | | As the DPU driver has switched to fetching data from MDSS driver, we can now drop the UBWC and highest_bank_bit parts of the DPU hw catalog. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/550058/ Link: https://lore.kernel.org/r/20230728213320.97309-7-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop compatibility INTR definesDmitry Baryshkov2023-08-025-9/+9
| | | | | | | | | | | | While reworking interrupts masks, it was easier to keep old MDP_INTFn_7xxx_INTR and MDP_INTFn_7xxx_TEAR_INTR symbols. Now it is time to drop them and use unified symbol names. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/549656/ Link: https://lore.kernel.org/r/20230727144543.1483630-6-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop now-unused mdss_irqs field from hw catalogDmitry Baryshkov2023-08-0216-132/+0
| | | | | | | | | | | Now as the list of the interrupts is constructed from the catalog data, drop the mdss_irqs field from catalog. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/549659/ Link: https://lore.kernel.org/r/20230727144543.1483630-5-dmitry.baryshkov@linaro.org
* drm/msm/dpu: Add SM6125 supportMarijn Suijten2023-07-271-0/+236
| | | | | | | | | | | Add definitions for the display hardware used on the Qualcomm SM6125 platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/548978/ Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-10-a3f287dd6c07@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: re-introduce dpu core revision to the catalogAbhinav Kumar2023-07-2715-0/+90
| | | | | | | | | | | | | | | | | | | Introduce the dpu core revision back as an entry to the catalog so that we can just use dpu revision checks and enable those bits which should be enabled unconditionally and not controlled by a catalog and also simplify the changes to do something like: if (dpu_core_revision > xxxxx && dpu_core_revision < xxxxx) enable the bit; changes in v5: - fix the commit text to remove instances of DPU_HW_VER Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/546801/ Link: https://lore.kernel.org/r/20230712012003.2212-2-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: drop empty features mask INTF_SDM845_MASKDmitry Baryshkov2023-07-112-8/+0
| | | | | | | | | | | The INTF_SDM845_MASK features mask is zero. Drop it completely. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545386/ Link: https://lore.kernel.org/r/20230704022136.130522-20-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop empty features mask MERGE_3D_SM8150_MASKDmitry Baryshkov2023-07-117-23/+0
| | | | | | | | | | | The MERGE_3D_SM8150_MASK features mask is zero. Drop it completely. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545384/ Link: https://lore.kernel.org/r/20230704022136.130522-19-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline INTF_BLK and INTF_BLK_DSI_TE macrosDmitry Baryshkov2023-07-1115-179/+545
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545378/ Link: https://lore.kernel.org/r/20230704022136.130522-18-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline WB_BLK macrosDmitry Baryshkov2023-07-113-6/+36
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545380/ Link: https://lore.kernel.org/r/20230704022136.130522-17-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline various PP_BLK_* macrosDmitry Baryshkov2023-07-1115-189/+527
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545371/ Link: https://lore.kernel.org/r/20230704022136.130522-16-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline MERGE_3D_BLK macrosDmitry Baryshkov2023-07-117-23/+99
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545382/ Link: https://lore.kernel.org/r/20230704022136.130522-15-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline DSC_BLK and DSC_BLK_1_2 macrosDmitry Baryshkov2023-07-1112-41/+189
| | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545370/ Link: https://lore.kernel.org/r/20230704022136.130522-14-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline LM_BLK macrosDmitry Baryshkov2023-07-1115-122/+487
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545362/ Link: https://lore.kernel.org/r/20230704022136.130522-13-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline DSPP_BLK macrosDmitry Baryshkov2023-07-1115-80/+215
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545359/ Link: https://lore.kernel.org/r/20230704022136.130522-12-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline SSPP_BLK macrosDmitry Baryshkov2023-07-1115-184/+751
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545377/ Link: https://lore.kernel.org/r/20230704022136.130522-11-dmitry.baryshkov@linaro.org
* drm/msm/dpu: correct indentation for CTL definitionsDmitry Baryshkov2023-07-1115-360/+309
| | | | | | | | | | | | | Shift dpu_ctl_cfg contents to correct the indentation of CTL blocks. This is done in preparation to expanding the rest of hardware block defines, so that all blocks have similar indentation. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545374/ Link: https://lore.kernel.org/r/20230704022136.130522-10-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop zero features from dpu_ctl_cfg dataDmitry Baryshkov2023-07-112-6/+0
| | | | | | | | | | | Drop useless zero assignments to the dpu_ctl_cfg::features field. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545366/ Link: https://lore.kernel.org/r/20230704022136.130522-9-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop zero features from dpu_mdp_cfg dataDmitry Baryshkov2023-07-117-7/+0
| | | | | | | | | | | Drop useless zero assignments to the dpu_mdp_cfg::features field. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545369/ Link: https://lore.kernel.org/r/20230704022136.130522-8-dmitry.baryshkov@linaro.org
* drm/msm/dpu: expand .clk_ctrls definitionsDmitry Baryshkov2023-07-1115-103/+133
| | | | | | | | | | | | Use more standard initialisation for .clk_ctrls definitions. Define a single .clk_ctrls field and use array init inside. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545368/ Link: https://lore.kernel.org/r/20230704022136.130522-7-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop enum dpu_mdp and MDP_TOP valueDmitry Baryshkov2023-07-1115-15/+15
| | | | | | | | | | | | Since there is always just a single MDP_TOP instance, drop the enum dpu_mdp and corresponding index value. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545357/ Link: https://lore.kernel.org/r/20230704022136.130522-6-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop dpu_mdss_cfg::mdp_count fieldDmitry Baryshkov2023-07-1115-75/+30
| | | | | | | | | | | There is always a single MDP TOP block. Drop the mdp_count field and stop declaring dpu_mdp_cfg instances as arrays. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545355/ Link: https://lore.kernel.org/r/20230704022136.130522-5-dmitry.baryshkov@linaro.org
* drm/msm/dpu: always use MSM_DP/DSI_CONTROLLER_nDmitry Baryshkov2023-07-1115-32/+32
| | | | | | | | | | | | | In several catalog entries we did not use existing MSM_DP_CONTROLLER_n constants. Fill them in. Also use freshly defined MSM_DSI_CONTROLLER_n for DSI interfaces. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545353/ Link: https://lore.kernel.org/r/20230704022136.130522-3-dmitry.baryshkov@linaro.org
* drm/msm/dpu1: Rename sm8150_dspp_blk to sdm845_dspp_blkKonrad Dybcio2023-07-1114-38/+38
| | | | | | | | | | | | | | | SDM845 was the first SoC to include both PCC v4 and GC v1.8. We don't currently support any other blocks but the common config for these two can be reused for a large amount of SoCs. Rename it to indicate the origin of that combo. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/533003/ Link: https://lore.kernel.org/r/20230420-topic-dpu_gc-v1-1-d9d1a5e40917@linaro.org [DB: also applied to new catalog files] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: remove unused INTF_NONE interfacesDmitry Baryshkov2023-06-163-3/+0
| | | | | | | | | | | sm6115, sm6375 and qcm2290 do not have INTF_0. Drop corresponding interface definitions. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/542180/ Link: https://lore.kernel.org/r/20230613001004.3426676-4-dmitry.baryshkov@linaro.org
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-17 19:26:17 +0000