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* drm/amdgpu: use node_id and node_size to calcualte dram_base_addressHawking Zhang2020-05-083-82/+2
| | | | | | | | | physical_node_id * node_segment_size should be the dram_base_address for current gpu node in xgmi config Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: switch to common rlc_autoload helperHawking Zhang2020-05-083-10/+1
| | | | | | | | | | | | drop IP specific psp function for rlc autoload since the autoload_supported was introduced to mark ASICs that support rlc_autoload Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: drop unused ras ta helper functionHawking Zhang2020-05-082-32/+0
| | | | | | | | | | | | cure posion command was replaced by ras recovery solution and was not a formal command supported by ras ta anymore Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: switch to common ras ta helperHawking Zhang2020-05-083-33/+30
| | | | | | | | | | | | TRIGGER_ERROR is common ras ta command for all the ASICs that support RAS feature. switch to common helper to avoid duplicate implementation per IP generation Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: switch to common xgmi ta helpersHawking Zhang2020-05-083-137/+123
| | | | | | | | | | | | | get_hive_id/get_node_id/get_topology_info/set_topology_info are common xgmi command supported by TA for all the ASICs that support xgmi link. They should be implemented as common helper functions to avoid duplicated code per IP generation Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove duplicate headersChen Zhou2020-05-071-1/+0
| | | | | | | Remove duplicate headers which are included twice. Signed-off-by: Chen Zhou <chenzhou10@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove variable "result" in dcn20_patch_unknown_plane_state()Jason Yan2020-05-071-3/+1
| | | | | | | | | | Fix the following coccicheck warning: drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c:3216:16-22: Unneeded variable: "result". Return "DC_OK" on line 3229 Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: cleanup coding style a bitBernard Zhao2020-05-071-30/+13
| | | | | | | | | | | | | | | | | | | | | There is DEVICE_ATTR mechanism in separate attribute define. So this change is to use attr array, also use sysfs_create_files in init function & sysfs_remove_files in fini function. This maybe make the code a bit readable. Signed-off-by: Bernard Zhao <bernard@vivo.com> Changes since V1: *Use DEVICE_ATTR mechanism Link for V1: *https://lore.kernel.org/patchwork/patch/1228076/ V2: make array const to fix build errors Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: add basic atomic check for cursor planeSimon Ser2020-05-071-2/+24
| | | | | | | | | | | | | | | | This patch adds a basic cursor check when an atomic test-only commit is performed. The position and size of the cursor plane is checked. This should fix user-space relying on atomic checks to assign buffers to planes. Signed-off-by: Simon Ser <contact@emersion.fr> Reported-by: Roman Gilg <subdiff@gmail.com> References: https://github.com/emersion/libliftoff/issues/46 Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix vblank and pageflip event handling for FreeSyncNicholas Kazlauskas2020-05-071-82/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] We're sending the drm vblank event a frame too early in the case where the pageflip happens close to VUPDATE and ends up blocking the signal. The implementation in DM was previously correct *before* we started sending vblank events from VSTARTUP unconditionally to handle cases where HUBP was off, OTG was ON and userspace was still requesting some DRM planes enabled. As part of that patch series we dropped VUPDATE since it was deemed close enough to VSTARTUP, but there's a key difference betweeen VSTARTUP and VUPDATE - the VUPDATE signal can be blocked if we're holding the pipe lock. There was a fix recently to revert the unconditional behavior for the DCN VSTARTUP vblank event since it was sending the pageflip event on the wrong frame - once again, due to blocking VUPDATE and having the address start scanning out two frames later. The problem with this fix is it didn't update the logic that calls drm_crtc_handle_vblank(), so the timestamps are totally bogus now. [How] Essentially reverts most of the original VSTARTUP series but retains the behavior to send back events when active planes == 0. Some refactoring/cleanup was done to not have duplicated code in both the handlers. Fixes: 16f17eda8bad ("drm/amd/display: Send vblank and user events at vsartup for DCN") Fixes: 3a2ce8d66a4b ("drm/amd/display: Disable VUpdate interrupt for DCN hardware") Fixes: 2b5aed9ac3f7 ("drm/amd/display: Fix pageflip event race condition for DCN.") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix bug in RAS invokeJohn Clements2020-05-071-3/+3
| | | | | | | | Invoke sequence should abort when ras interrupt is detected before reading TA host shared memory Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/navi10: fix unsigned comparison with 0ChenTao2020-05-061-2/+0
| | | | | | | | | | | | Fixes warning because size is uint32_t and can never be negtative drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1296:12: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] if (size < 0) Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: ChenTao <chentao107@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Use GEM obj reference for KFD BOsFelix Kuehling2020-05-061-2/+3
| | | | | | | | | | | | | | | Releasing the AMDGPU BO ref directly leads to problems when BOs were exported as DMA bufs. Releasing the GEM reference makes sure that the AMDGPU/TTM BO is not freed too early. Also take a GEM reference when importing BOs from DMABufs to keep references to imported BOs balances properly. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Tested-by: Alex Sierra <alex.sierra@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: force fbdev into vramAlex Deucher2020-05-061-2/+1
| | | | | | | | | | We set the fb smem pointer to the offset into the BAR, so keep the fbdev bo in vram. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=207581 Fixes: 6c8d74caa2fa33 ("drm/amdgpu: Enable scatter gather display support") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: perform PG ungate prior to CG ungateEvan Quan2020-05-062-6/+6
| | | | | | | | | Since gfxoff should be disabled first before trying to access those GC registers. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: drop unnecessary cancel_delayed_work_sync on PG ungateEvan Quan2020-05-062-14/+4
| | | | | | | | | | As this is already properly handled in amdgpu_gfx_off_ctrl(). In fact, this unnecessary cancel_delayed_work_sync may leave a small time window for race condition and is dangerous. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: disable MGCG/MGLS also on gfx CG ungateEvan Quan2020-05-061-1/+1
| | | | | | | | Otherwise, MGCG/MGLS will be left enabled. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use the BAR if possible in amdgpu_device_vram_access v2Christian König2020-05-061-0/+26
| | | | | | | | | | | | | | | | | This should speed up debugging VRAM access a lot. v2: add HDP flush/invalidate Unrevert: RAS issue at root of the issue has been addressed Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Jonathan Kim <Jonathan.Kim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Kent Russell <kent.russell@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add dm support for DP 1.4 Compliance edid corruption testJerry (Fangzhi) Zuo2020-05-061-27/+13
| | | | | | | | | | | | It works together with drm framework "drm: Add support for DP 1.4 Compliance edid corruption test" Add the edid validity check scenario when edid base block is read back with error. Send back real edid checksum and enable fail-safe mode in DC. Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: allocate large structures dynamicallyArnd Bergmann2020-05-051-10/+21
| | | | | | | | | | | | | | | | | After the structure was padded to 1024 bytes, it is no longer suitable for being a local variable, as the function surpasses the warning limit for 32-bit architectures: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:587:5: error: stack frame size of 1072 bytes in function 'amdgpu_ras_feature_enable' [-Werror,-Wframe-larger-than=] int amdgpu_ras_feature_enable(struct amdgpu_device *adev, ^ Use kzalloc() instead to get it from the heap. Fixes: a0d254820f43 ("drm/amdgpu: update RAS TA to Host interface") Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* amdgpu_acpi: add backlight control for the DC caseAndriy Gapon2020-05-051-1/+21
| | | | | | | | This uses backlight_device_set_brightness() to set the brightness level requested via ATIF. Signed-off-by: Andriy Gapon <avg@FreeBSD.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix unsigned comparison with 0ChenTao2020-05-051-2/+2
| | | | | | | | | | | | | | | Fixes warning because pipe is unsigned long and can never be negtative vers/gpu/drm/radeon/radeon_kms.c:831:11: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] if (pipe < 0 || pipe >= rdev->num_crtc) { drivers/gpu/drm/radeon/radeon_kms.c:857:11: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] if (pipe < 0 || pipe >= rdev->num_crtc) { Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: ChenTao <chentao107@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Avoid integer overflow in amdgpu_device_suspend_display_audioNathan Chancellor2020-05-051-1/+1
| | | | | | | | | | | | | | | | | | | | When building with Clang: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4160:53: warning: overflow in expression; result is -294967296 with type 'long' [-Winteger-overflow] expires = ktime_get_mono_fast_ns() + NSEC_PER_SEC * 4L; ^ 1 warning generated. Multiplication happens first due to order of operations and both NSEC_PER_SEC and 4 are long literals so the expression overflows. To avoid this, make 4 an unsigned long long literal, which matches the type of expires (u64). Fixes: 3f12acc8d6d4 ("drm/amdgpu: put the audio codec into suspend state before gpu reset V3") Link: https://github.com/ClangBuiltLinux/linux/issues/1017 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: 3.2.84Aric Cyr2020-05-051-1/+1
| | | | | | Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add struct field for future useAnthony Koo2020-05-051-0/+1
| | | | | | | | | Add dmub related struct field for future use. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: move location of dmub_srv.h fileAnthony Koo2020-05-0516-25/+25
| | | | | | | | | | | | | | | | | | | | | | | | | [Why] Make a separation of what belongs in the differen dmub headers dmub_srv.h is for exposing dmub srv interface to rest of driver. other headers inside dmub/inc exposes cmds and definitions that are owned by the firmware [How] keep firmware owned definitions in dmub/inc move stuff that is purely driver interface headers to dmub/ since those are interface calls that are defined for rest of driver to use Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove unused module/statsAurabindo Pillai2020-05-051-448/+0
| | | | | Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Check DMCU Exists Before LoadingJerry (Fangzhi) Zuo2020-05-051-1/+6
| | | | | | | Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Prevent dpcd reads with passive donglesAurabindo Pillai2020-05-051-6/+11
| | | | | | | | | | | | | | | | [why] During hotplug, a DP port may be connected to the sink through passive adapter which does not support DPCD reads. Issuing reads without checking for this condition will result in errors [how] Ensure the link is in aux_mode before initiating operation that result in a DPCD read. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add 4 to 1 MPC split supportIsabel Zhang2020-05-053-34/+79
| | | | | | | | | | | | | | | | | [Why] Want to make use of detile buffer of all 4 pipes to maximize amount of data stored to hide certain memory latency cases. [How] In case of 1 plane and 1 stream, program 4 pipes to each retrieve 1/4 of plane later mixed together by the MPCs. Added support for transition from 4 to 1 MPC to 2 to 1 MPC or no pipe split case and vice versa. Currently, only enabled if debug flag is set. Signed-off-by: Isabel Zhang <isabel.zhang@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: The external monitor will show gray screen during SUT rebootyanyan kang2020-05-051-0/+16
| | | | | | | | | | | | | | | [Why] same with CL#1711022(correcting yuv420 black color in function dcn10_blank_pixel_data,program_scaler), yuv420 black color also needs to be correct when enabling HDMI stream at the resume procedure. [How] correcting the yuv420 black color according to the way how 420 is packed :2 channels carry Y component, 1 channel alternate between Cb and Cr. Signed-off-by: yanyan kang <Yanyan.Kang@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: add addition dc type to translate to dmub fw typeAnthony Koo2020-05-056-8/+21
| | | | | | | | | | | | | | | | | | | | | [Why] For a type like PSR version, it makes sense for most of the code to include a dc type, instead of having this a fw type define since this is a capability and type exposed by dc. Especially if it doesn't even need to communicate with the fw. The code that is packing the firmware command message should be the one who needs to translate the psr version into a command that the firmware understands. [How] Add a dc_psr_version enum. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Support FP16 pixel formatStylon Wang2020-05-051-0/+8
| | | | | | | | | | | | | [Why] FP16 pixel format is not declared to DRM in Linux DM. [How] Add FP16 format to the support list presented to DRM from Linux DM. Signed-off-by: Stylon Wang <stylon.wang@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: temporary clamp the vratio used to 1.0Lewis Huang2020-05-051-12/+14
| | | | | | | | | | | | | | | [Why] in Is_Support function, driver report different caps between same timing but different scaling cause OS inconsistent. [How] min_row_time is a local that’s only used for verifying immediate flip support. Clamp the vratio used for its calculation to 1.0. Signed-off-by: Lewis Huang <Lewis.Huang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Allow PState switch in VBLANK one display VACTIVEAlvin Lee2020-05-056-1/+34
| | | | | | | | | | | | | | | [Why] For certain display configurations we want to allow PSTATE switch when one display can switch in VACTIVE and the other display can switch in VBLANK [How] Add extra condition to dcn2 pstate support check Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix counter in wait_for_no_pipes_pendingRoman Li2020-05-051-3/+2
| | | | | | | | | | | | | [Why] Wait counter is not being reset for each pipe. [How] Move counter reset into pipe loop scope. Signed-off-by: Roman Li <roman.li@amd.com> Reviewed-by: Zhan Liu <Zhan.Liu@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Mode change with same timing causing long display blankAric Cyr2020-05-054-106/+0
| | | | | | | | | | | | | | | | [Why] What a mode change is requested for the same timing a full stream reset can occur in some cases which causes monitor to blank for a few seconds. [How] Do not consider infoframe updates as needing a full stream reset as they will be handled on the first flip after a modeset when surface information is available. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Update DCN2.1 DV Code RevisionSung Lee2020-05-051-4/+4
| | | | | | | | | | | | | [WHY & HOW] There is a problem in hscale_pixel_rate, the bug causes DCN to be more optimistic (more likely to underflow) in upscale cases during prefetch. This commit ports the fix from DV code to address these issues. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Move panel_cntl specific register from abm to panel_cntl.Yongqiang Sun2020-05-0518-463/+339
| | | | | | | | | | | | | [Why] panel_cntl specific register should be access in panel_cntl object. [How] Move these register access from abm to panel_cntl. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove unused variable 'ret' in dm_suspend()Jason Yan2020-05-051-2/+1
| | | | | | | | | | Fix the following coccicheck warning: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:1574:5-8: Unneeded variable: "ret". Return "0" on line 1586 Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* amd/amdgpu: Limit rlcg write registers only for nv12shaoyunl2020-05-011-7/+25
| | | | | | | | | Create gfx_v10_0_rlc_funcs_sriov for nv12 with rlcg_write function pointers be initialized so driver can use RLCG to write aceess CSIB and CP_ME_CNTL registers when nv12 in sriov mode Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdkfd: Use a systematic method to calculate queue mask bitYong Zhao2020-05-012-1/+6
| | | | | | | | | The queue mask used for set_resources always assumes the queue number per pipe is 8, so KFD needs to align with that by using function amdgpu_queue_mask_bit_to_set_resource_bit(). Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Rename amdgpu_gfx_kcq_queue_mask_transform()Yong Zhao2020-05-012-9/+9
| | | | | | | | Rename it to amdgpu_queue_mask_bit_to_set_resource_bit() to be more specific about its functionality. KFD will use it later. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: skip reservation of discovery tmr region in pre-NaviHawking Zhang2020-05-011-3/+5
| | | | | | | | | | IP discovery is only supported in Navi series and onwards. There is no need to reserve a portion of vram as discovery tmr region for pre-Navi adapters. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: re-structue members for ip discoveryHawking Zhang2020-05-013-35/+38
| | | | | | | | | This is to prepare for initializing discovery tmr size per ASIC type Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: update the method to set kcq queue maskLikun Gao2020-05-011-1/+14
| | | | | | | | | Use a common method to set queue mask before set kiq resource. The value of queue mask must suitablt for the designated form. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: check SMU NULL ptr on gfx hw initLikun Gao2020-05-011-7/+9
| | | | | | | | Check SMU NULL ptr before load smu fw. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: change HWIP from UVD to VCN for VCN2.5Boyuan Zhang2020-05-011-196/+196
| | | | | | | | | | | | | | Rename hardware IP name from UVD to VCN to reduce confusion. Hardware IP name UVD and VCN are equivalent for VCN2.5 asics. Use name VCN for future VCN based asics. V2: update description V3: rebase Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: James Zhu <james.zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add missing parameter description in commentsFelix Kuehling2020-05-012-0/+2
| | | | | | | | | Kerneldoc comments should describe all function parameters. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdkfd: Fix comment formattingFelix Kuehling2020-05-011-2/+2
| | | | | | | | | Corrected two function names. Added a missing space. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-14 10:49:50 +0000