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path: root/src/soc/amd/cezanne/Makefile.inc
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* soc/amd/cezanne: factor out UPD-M configuration from romstageFelix Held2021-03-291-0/+1
* soc/amd/cezanne,picasso: rename fsp_params.c to fsp_s_params.cFelix Held2021-03-291-1/+1
* soc/amd/cezanne: Get I2C specific code for cezanneZheng Bao2021-03-221-0/+4
* soc/amd/cezanne: add XHCI SCI/GEVENT setupFelix Held2021-03-121-0/+1
* mb/amd/majolica: Update to use proper APCBs built for MajolicaMatt Papageorge2021-03-101-1/+1
* soc/amd/cezanne/Makefile: pass APOB NV parameters to amdfwtoolFelix Held2021-03-091-0/+9
* soc/amd/cezanne: Include gpio.c in smmMathew King2021-03-081-0/+1
* soc/amd/cezanne: add SMU supportFelix Held2021-03-041-0/+1
* soc/amd/cezanne: Add PSP whitelist debug unlock supportRaul E Rangel2021-03-011-0/+8
* soc/amd/cezanne/Makefile: move setting of PSP soft fuse bit 6Felix Held2021-02-241-2/+2
* soc/amd/cezanne: Add uart.c to smm so we can support DEBUG_SMIRaul E Rangel2021-02-151-0/+1
* soc/amd/cezanne: add partial data fabric setupFelix Held2021-02-141-0/+1
* soc/amd/cezanne: select ACPI support and make the compiler happyFelix Held2021-02-131-0/+2
* soc/amd/cezanne: always include PSP secure OS in amdfwFelix Held2021-02-131-7/+1
* soc/amd/cezanne: always add S0i3 firmware part to amdfwFelix Held2021-02-131-5/+1
* soc/amd: include cpu/x86/smm directory in common SMM MakefileFelix Held2021-02-111-1/+0
* soc/amd/cezanne: add empty SMM-handlerFelix Held2021-02-111-0/+3
* soc/amd/cezanne: Add root_complexRaul E Rangel2021-02-091-0/+1
* soc/amd/cezanne: add empty CPU driverFelix Held2021-02-091-0/+1
* soc/amd/cezanne/Makefile.inc: Fix indentationRaul E Rangel2021-02-071-5/+5
* soc/amd/cezanne/pcie_gpp: scan internal PCI busesFelix Held2021-02-071-0/+1
* soc/amd/cezanne: add empty ramstage FCH supportFelix Held2021-01-291-0/+1
* soc/amd/cezanne: Add UCODE firmware to CBFSZheng Bao2021-01-271-2/+2
* soc/amd: Throw an error if FWM_POSITION_INDEX is emptyZheng Bao2021-01-271-0/+3
* soc,vendorcode/amd/cezanne: add basic FSP integrationFelix Held2021-01-241-0/+4
* soc/amd/cezanne: Add PSP integration for cezanneZheng Bao2021-01-241-0/+145
* soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16Felix Held2021-01-211-0/+1
* soc/amd/cezanne: add AOAC supportFelix Held2021-01-141-1/+2
* soc/amd/cezanne: add console UART supportFelix Held2021-01-141-0/+4
* soc/amd/cezanne: add GPIO supportFelix Held2020-12-181-0/+4
* soc/amd/cezanne: add caching setup in bootblockFelix Held2020-12-131-0/+2
* soc/amd/cezanne: add 0xcf9 resetFelix Held2020-12-111-0/+5
* soc/amd/piasso,cezanne: add warning about using all-y in Makefile.incFelix Held2020-12-111-0/+1
* soc/amd/cezanne: add basic early FCH initialization to bootblockFelix Held2020-12-091-0/+1
* soc/amd/cezanne: add config.c and minimal chip.hFelix Held2020-12-061-0/+2
* soc/amd/cezanne: use common TSC and monotonic timer codeFelix Held2020-12-061-1/+0
* soc/amd/cezanne: add skeleton for new SoCFelix Held2020-12-051-0/+14