summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/braswell/chip.c
Commit message (Expand)AuthorAgeFilesLines
* soc/intel/braswell,skylake: Drop logo parameters from devicetreeKyösti Mälkki2021-02-081-2/+0
* soc/intel/braswell/chip.c: Use __func__Elyes HAOUAS2021-01-181-2/+2
* soc/intel/braswell: Clean up devicetree settingsAngel Pons2020-12-141-6/+6
* src/soc/intel: Drop unneeded empty linesElyes HAOUAS2020-09-211-1/+0
* soc/intel/braswell: Drop some BIOS_SPEW printk'sAngel Pons2020-07-091-17/+0
* device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel2020-05-121-6/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber2020-04-101-2/+2
* Drop unnecessary DEVICE_NOOP entriesNico Huber2020-04-101-1/+0
* soc/intel/braswell: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* Drop explicit NULL initializations from `device_operations`Elyes HAOUAS2020-04-051-2/+0
* soc/intel/braswell: Clean upAngel Pons2020-03-231-243/+229
* soc: Remove copyright noticesPatrick Georgi2020-03-181-2/+0
* {drivers,soc}/intel/fsp1_1: Move chipset specific logo handling to SoCWim Vervoorn2019-12-201-0/+5
* soc/intel: Use config_of()Kyösti Mälkki2019-07-181-1/+1
* soc/intel/braswell: add default option to use public FSPMatt DeVillier2019-05-031-25/+0
* soc/{amd,intel}/chip: Use local include for chip.hElyes HAOUAS2019-04-261-1/+2
* {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik2019-03-211-15/+1
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* src/soc/intel/braswell: Use DEVICE_NOOPElyes HAOUAS2019-01-201-5/+3
* device: Use pcidev_on_root()Kyösti Mälkki2019-01-061-2/+2
* src: Remove unneeded whitespaceElyes HAOUAS2018-10-231-3/+3
* Move compiler.h to commonlibNico Huber2018-10-081-1/+0
* soc/intel/braswell: Get rid of device_tElyes HAOUAS2018-06-041-6/+6
* {mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber2018-05-081-1/+0
* compiler.h: add __weak macroAaron Durbin2018-04-241-1/+2
* soc/intel/braswell: add USB2 PHY PERPORTRXISET UPDKevin Chiu2017-09-081-0/+30
* soc/intel/braswell: Add USB2 phy setting overrideMatt DeVillier2017-09-081-0/+5
* soc/intel/braswell: Add SoC stepping identify helperMatt DeVillier2017-09-081-0/+81
* soc/intel/braswell: Add I2C clock config optionsDivagar Mohandass2017-09-081-0/+7
* soc/intel/braswell: Add int to unsignedLee Leahy2017-03-171-1/+2
* soc/braswell: Fix issues found during static code analysisRavi Sarawadi2016-01-281-1/+10
* soc/braswell: Disable SD card detect simulation in FSPDivya Sasidharan2016-01-281-0/+3
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* FSP 1.1: Replace soc_ prefix with fsp_Lee Leahy2015-10-271-62/+62
* Braswell: Modify CB to accomodate new FSPv83Subrata Banik2015-10-111-8/+6
* fsp1_1: provide binding to UEFI versionAaron Durbin2015-09-101-1/+1
* Braswell: Add Braswell SOC supportLee Leahy2015-06-251-11/+269
* Remove address from GPLv2 headersPatrick Georgi2015-05-281-1/+1
* Braswell: Use Baytrail as Comparison BaseLee Leahy2015-05-231-0/+93
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 00:16:25 +0000