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path: root/src/soc/intel/tigerlake
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* soc/intel/tigerlake: Expose In-Band ECC config to mainboardFrans Hendriks2022-08-072-0/+37
* soc/intel/common/pch: Decouple CLIENT from BASEAngel Pons2022-07-201-1/+1
* soc/intel/*/Kconfig: Fix typo in commentAngel Pons2022-06-271-1/+1
* soc/intel/tigerlake: Replace spaces with tabsSean Rhodes2022-06-221-5/+5
* device/resource: Add _kb postfix for resource allocatorsKyösti Mälkki2022-06-221-1/+1
* soc/intel: Rename heci_init to cse_initSubrata Banik2022-06-041-1/+1
* soc/intel/common/cpu: Use SoC overrides to set CPU privilege levelSubrata Banik2022-06-021-0/+9
* soc/intel/tgl: Add PEG devices to PCI constraintsTim Crawford2022-05-281-0/+8
* soc/intel/tigerlake: Hook up FSP hyper-threading setting to option APIFelix Singer2022-05-262-0/+4
* soc/intel/tigerlake: Drop unused `PCH_DEV_SLOT_LPC` macroSubrata Banik2022-05-251-1/+0
* soc/intel/*: Fix up header guardsArthur Heymans2022-05-161-1/+1
* soc/intel/*: Use SSDT to pass A4GB and A4GSArthur Heymans2022-05-162-3/+2
* soc/inte/*/gpio; Add GPE_EN and GPE_STS register definitionMaulik V Vaghela2022-05-162-0/+12
* soc/intel/tigerlake/meminit.c: Fix clang static assertsArthur Heymans2022-05-131-2/+4
* soc/intel/tigerlake: Add enum for `DdiPortXConfig`Angel Pons2022-05-051-7/+9
* soc/{amd/stoneyridge,intel}: Don't select VBOOT_SEPARATE_VERSTAGEArthur Heymans2022-04-291-1/+0
* soc/intel: Decouple HECI disabling interface from HECI disable KconfigSubrata Banik2022-04-291-1/+1
* soc/intel/cmn/lockdown: Perform SA lockdown configurationSubrata Banik2022-04-271-8/+0
* soc/intel: Remove unused <cbmem.h>Elyes HAOUAS2022-04-221-1/+0
* tpm: Refactor TPM Kconfig dimensionsJes B. Klinke2022-04-211-5/+1
* soc/intel: clean up dmi driver codeWonkyu Kim2022-04-201-6/+0
* soc/intel/(cnl, jsl, tgl): Enable SOC_INTEL_COMMON_BASECODESridhar Siricilla2022-04-061-0/+1
* soc/intel/common: Abstract the common TCSS functionsJohn2022-04-063-1/+9
* soc/intel: Move `pmc_clear_pmcon_sts()` into IA common codeSubrata Banik2022-03-293-17/+1
* soc/intel/tgl: move DIMM_SPD_SIZE from mb to SoC KconfigMichael Niewöhner2022-03-151-0/+3
* {mb, soc}: Move mrc_cache invalidating logic into `memory` common codeSubrata Banik2022-03-151-2/+1
* soc/intel/common: Pass `FSPM_UPD *` argument for spd functionsSubrata Banik2022-03-151-2/+2
* {mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototypeSubrata Banik2022-03-152-2/+3
* soc/intel/tgl: chipset devicetree: correct TraceHub device aliasMichael Niewöhner2022-03-081-1/+1
* soc/intel/tgl: drop orphaned VR domains enumMichael Niewöhner2022-03-081-12/+0
* soc/intel/tigerlake: Hide PMC and IOM devicesMichał Kopeć2022-03-072-0/+4
* src: Make PCI ID define names shorterFelix Singer2022-03-073-62/+62
* mb, soc: Add the SPD_CACHE_ENABLEZhuohao Lee2022-03-021-1/+3
* intelblocks/pcie: Correct mapping between LCAP port and coreboot indexMAULIK V VAGHELA2022-02-251-7/+7
* arch/x86: factor out and commonize HPET_BASE_ADDRESS definitionFelix Held2022-02-251-2/+0
* drivers/fsp/fsp2_0: Rework FSP Notify Phase API configsSubrata Banik2022-02-181-1/+4
* soc/intel/*/pmc: Add `finalize` operation for pmcSubrata Banik2022-02-151-0/+17
* treewide: Remove "ERROR: "/"WARN: " prefixes from log messagesJulius Werner2022-02-071-1/+1
* cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki2022-02-051-3/+0
* soc/intel/tigerlake: Use PMC IPC to disable HECI1Subrata Banik2022-02-023-15/+4
* soc/intel/common/cse: Rework heci_disable functionSubrata Banik2022-02-021-1/+1
* soc/intel: Abstract the common block API for TCSS registers accessJohn Zhao2022-01-281-0/+2
* soc/intel/common/cpu: Use SoC overrides to get CPU privilege levelSubrata Banik2022-01-192-1/+11
* soc/intel/tgl: Replace dt `HeciEnabled` by `HECI1 disable` configSubrata Banik2022-01-142-9/+1
* soc/intel/tigerlake: add devicetree option PcieRpSlotImplementedMichael Niewöhner2022-01-142-0/+3
* soc/intel/tgl: deduplicate the PCIe root port mapMichael Niewöhner2022-01-141-17/+2
* soc/intel/tgl/pcie_rp: add TGL-H supportMichael Niewöhner2022-01-141-1/+18
* soc/intel/tigerlake: Implement function to map physical port to EC portjzhao802022-01-122-0/+33
* soc/intel/tgl/pcie_rp: correct root port mapMichael Niewöhner2022-01-121-2/+1
* src/soc/intel: Remove unused <console/console.h>Elyes HAOUAS2022-01-101-1/+0
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