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| author | Antoine Cœur <coeur@gmx.fr> | 2019-07-11 16:31:15 +0800 |
|---|---|---|
| committer | Chasel Chiu <chasel.chiu@intel.com> | 2019-07-11 21:07:16 +0800 |
| commit | efa12a3f029bd6ff4d2ada406c285f001b252907 (patch) | |
| tree | f2d593af9e3c94edd04949f0d893200462dbe1fc /IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm | |
| parent | 7a0df266e5c58bac91dc21089b5b71ceb0dfa48f (diff) | |
| download | edk2-efa12a3f029bd6ff4d2ada406c285f001b252907.tar.gz edk2-efa12a3f029bd6ff4d2ada406c285f001b252907.tar.bz2 edk2-efa12a3f029bd6ff4d2ada406c285f001b252907.zip | |
Revert "FmpDevicePkg: Fix various typos"
This reverts commit f527942e6bdd9f198db90f2de99a0482e9be5b1b.
Commit message was incorrect.
Signed-off-by: Cœur <coeur@gmx.fr>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Diffstat (limited to 'IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm')
| -rw-r--r-- | IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm index ebc91c41e4..e1886ea11b 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm +++ b/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm @@ -1,6 +1,6 @@ ;------------------------------------------------------------------------------
;
-; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Abstract:
@@ -46,7 +46,7 @@ ASM_PFX(InitializeFloatingPointUnits): fldcw [ASM_PFX(mFpuControlWord)]
;
- ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
+ ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
; whether the processor supports SSE instruction.
;
mov eax, 1
|