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* MdeModulePkg: Initialize local variable value before they are usedLiming Gao2021-03-251-0/+5
| | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3228 This change is to fix the false compiler error on GCC49 release build. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg/UfsPassThruDxe: Improve Device initialization polling LoopBandaru, Purna Chandra Rao2021-03-052-5/+15
| | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=3217 Current Ufs Pass thru driver polls for 5us and return success even when the timeout occurs. There are cards that can take upto 600ms for Init and hence increased the time out for fDeviceInit polling loop. Signed-off-by: Bandaru <purna.chandra.rao.bandaru@intel.com> Cc: Mateusz Albecki <mateusz.albecki@intel.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/PciBusDxe: Fix a bug in ProcessOptionRomLightAiden Park2021-02-021-6/+1
| | | | | | | | | | | | | The ProcessOptionRomLight() assumes that OpRom has already been processed in the previous full enumeration and updates AllOpRomProcessed flag to TRUE by default. However, this may not be applicable with other pre-stage boot firmwares. This will update AllOpRomProcessed flag properly by checking PciRomGetImageMapping(). Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* MdeModulePkg/PciBusDxe: Handle BAR sizing fail in high 32bit of MEM64.Zarcd Zhong2021-01-181-0/+1
| | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3149 Address MEM64 BAR in type unknown if sizing fail in high 32bit. Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Zarcd Zhong <zarcd.zhong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* MdeModulePkg/Bus/Pci/PciBusDxe: Support PCIe Resizable BAR CapabilityLuo, Heng2021-01-046-19/+234
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=313 Add PcdPcieResizableBarSupport to enable/disable PCIe Resizable BAR Capability fearture. Program the Resizable BAR Register if the device suports PCIe Resizable BAR Capability and PcdPcieResizableBarSupport is TRUE. Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Heng Luo <heng.luo@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* MdeModulePkg/PciSioSerialDxe: Flush Tx before config changeMichael D Kinney2020-12-191-1/+90
| | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=3114 Add logic to flush all UART transmit buffers if there is a config change from Reset(), SetAttributes() or SetControl(). Use a timeout in the flush operation, so the system can continue to boot if the transmit buffers can not be flushed for any reason. This change prevents lost characters on serial debug logs and serial consoles when a config change is made. It also prevents a UART from getting into a bad state or reporting error status due to characters being transmitted at the same time registers are updated with new communications settings. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/AtaAtapiPassThru: Trace ATA packetsAlbecki, Mateusz2020-11-111-0/+94
| | | | | | | | | | | | | This simplify ATA driver debugging all ATA packets will be printed to debug port on DEBUG_VERBOSE level along with the packet execution status. Additionally failed packets and the failed packet execution status will be printed on DEBUG_ERROR level. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/AtaAtapiPassThru: Restart failed packetsAlbecki, Mateusz2020-11-112-125/+182
| | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3026 This commit adds code to restart the ATA packets that failed due to the CRC error or other link condition. For sync transfers the code will try to get the command working for up to 5 times. For async transfers, the command will be retried until the timeout value timeout specified by the requester is reached. For sync case the count of 5 retries has been chosen arbitrarily and if needed can be increased or decreased. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/AtaAtapiPassThru: Add SATA error recovery flowAlbecki, Mateusz2020-11-112-24/+159
| | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3025 This commit adds error recovery flow on SATA port when the error condition is reported. Commit only implements SATA port reset flow which is executed when PxTFD indicates BSY or DRQ. Commit does not implement HBA level reset. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/AtaAtapiPassThru: Check IS to check for command completionAlbecki, Mateusz2020-11-112-171/+132
| | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3024 AHCI driver used to poll D2H register type to determine whether the FIS has been received. This caused a problem of long timeouts when the link got a CRC error and the FIS never arrives. To fix this this change switches AHCI driver to poll the IS register which will signal both the reception of FIS and the occurrence of error. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Retry device slot init on failureJon Hunter2020-11-022-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | With some super-speed USB mass storage devices it has been observed that a USB transaction error may occur when attempting the set the device address during enumeration. According the the xHCI specification (section 4.6.5) ... "A USB Transaction ErrorCompletion Code for an Address Device Command may be due to a Stall response from a device. Software should issue a Disable Slot Commandfor the Device Slot then an Enable Slot Command to recover from this error." To fix this, retry the device slot initialization if it fails due to a device error. Change was verified using a superspeed mass storage device that was occasionally failing to enumerate in UEFI. With this change this failure to enumerate was resolved. This failure was also only seen in UEFI and not in the OS. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Error handle for USB slot initialization failureLuo, Heng2020-10-271-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3007 Currently UsbDevContext is not cleaned up if USB slot initialization is failed, the wrong context data will affect next USB devices and the USB devices can not be enumerated. Need to disable slot if USB slot initialization is failed. Below test cases are passed on UpXtreme: a. USB 3.0 thumb drives can be recognized in UEFI shell b. SUT can boot to Puppylinux from USB3.0 mass storage, the storage can be recognized in linux c. Plug in a USB keyboard (hot plug) and enumeration is OK in UEFI shell and linux d. Plug in a USB mouse(hot plug) and enumeration is OK in linux. Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Heng Luo <heng.luo@intel.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Fix Broken TimeoutsPatrick Henz2020-09-292-28/+94
| | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2948 Timeouts in the XhciDxe driver are taking longer than expected due to the timeout loops not accounting for code execution time. As en example, 5 second timeouts have been observed to take around 36 seconds to complete. Use SetTimer and Create/CheckEvent from Boot Services to determine when timeout occurred. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Patrick Henz <patrick.henz@hpe.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/NonDiscoverablePciDeviceDxe: Add NULL pointer checkJeff Brasen2020-09-181-0/+4
| | | | | | | | Add check for NULL HostAddress in AllocateBuffer as required by UEFI specification. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg: Fix spelling mistake for occurredMichael D Kinney2020-08-191-2/+2
| | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2361 Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/UfsPassThruDxe: Use BaseLib linked list iteration macrosMichael Kubacki2020-04-213-10/+5
| | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959 Replaces usage of the linked list iteration macros defined in UfsPassThru.h with the common definition in BaseLib.h. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* MdeModulePkg/XhciDxe: Use BaseLib linked list iteration macrosMichael Kubacki2020-04-212-12/+6
| | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959 Replaces usage of the linked list iteration macros defined in Xhci.h with the common definition in BaseLib.h. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* MdeModulePkg/EhciPei: Use BaseLib linked list iteration macrosMichael Kubacki2020-04-214-17/+9
| | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959 Replaces usage of the linked list iteration macros defined in EhcPeim.h with the common definition in BaseLib.h. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* MdeModulePkg/EhciDxe: Use BaseLib linked list iteration macrosMichael Kubacki2020-04-214-22/+12
| | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959 Replaces usage of the linked list iteration macros defined in Ehci.h with the common definition in BaseLib.h. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* MdeModulePkg/NonDiscoverablePciDeviceDxe: use standard PCI_MAX_BAR macroLaszlo Ersek2020-04-162-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | NonDiscoverablePciDeviceDxe currently #defines the module-internal PCI_MAX_BARS macro, with value 6 (and type "int"). Remove this private macro definition, and adopt PCI_MAX_BAR from "MdePkg/Include/IndustryStandard/Pci22.h". Both the value and the type remain unchanged (the standard PCI_MAX_BAR macro expands to 0x0006). "NonDiscoverablePciDeviceIo.h" gets the definition of PCI_MAX_BAR via its existent #include <IndustryStandard/Pci.h> directive. Build-tested only. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200409113017.18233-1-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* MdeModulePkg/SdDxe: Check the Token to avoid null pointerGuomin Jiang2020-03-271-1/+8
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2286 Token pointer may be NULL, it should be checked before use it. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Pci: Fixed Asserts in SCT PCIIO Protocol Test.Gaurav Jain2020-03-052-3/+155
| | | | | | | | | | | | | | ASSERT in PollMem_Conf, CopyMem_Conf, SetBarAttributes_Conf Conformance Test. SCT Test expect return as Invalid Parameter or Unsupported. Added Checks for Function Parameters. return Invalid or Unsupported if Check fails. Added Checks in PciIoPollIo(), PciIoIoRead() PciIoIoWrite() Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Fix PIO transfer modeAlbecki, Mateusz2020-03-052-21/+114
| | | | | | | | | | | | | | | Current driver does not support PIO transfer mode for commands other then tuning. This change adds the code to transfer PIO data. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Do not map memory for non DMA transferAlbecki, Mateusz2020-03-051-27/+61
| | | | | | | | | | | | | | | | Driver code used to map memory for DMA transfer even if host doesn't support DMA. This is causing memory corruption when driver transfers data using PIO. This change refactors the code to skip call to PciIo->Map for non DMA transfers. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Refactor data transfer completionAlbecki, Mateusz2020-03-051-69/+112
| | | | | | | | | | | | | | | This patch refactors the way in which the driver will check the data transfer completion. Data transfer related functionalities have been moved to separate function. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Read response on command completionAlbecki, Mateusz2020-03-052-58/+144
| | | | | | | | | | | | | | | | | | SdMmcPciHcDxe driver used to read response only after command and data transfer completed. According to SDHCI specification response data is ready after the command complete status is set by the host controller. Getting the response data early will help debugging the cases when command completed but data transfer timed out. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Enhance driver tracesAlbecki, Mateusz2020-03-051-0/+87
| | | | | | | | | | | | | | | | | | | To allow for easier debug of failing commands we have added a capability to print TRB and command packet when we start execution of the TRB(on DEBUG_VERBOSE level) and when the TRB failed to execute correctly(on DEBUG_ERROR level). Additionally we will also print error interrupt status and interrupt status register on failed SD command. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Send SEND_STATUS at lower frequencyAlbecki, Mateusz2020-03-054-24/+69
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1140 To avoid stability issues on some designs the driver will now send SEND_STATUS at previous, lower, frequency when upgrading the bus timing. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Fix double PciIo Unmap in TRB creation ↵Hao A Wu2020-02-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | (CVE-2019-14587) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1989 The commit will avoid unmapping the same resource in error handling logic for function BuildAdmaDescTable() and SdMmcCreateTrb(). For the error handling in BuildAdmaDescTable(): The error is directly related with the corresponding Map() operation (mapped address beyond 4G, which is not supported in ADMA), so the Unmap() operation is done in the error handling logic, and then setting 'Trb->AdmaMap' to NULL to avoid double Unmap. For the error handling in SdMmcCreateTrb(): The error is not directly related with the corresponding Map() operation, so the commit will update the code to left SdMmcFreeTrb() for the Unmap operation to avoid double Unmap. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdeModulePkg: Issues reported by ECC in EDK2.GuoMinJ2020-02-142-3/+3
| | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=2515 Change the MdeModulePkg to match the ECC check rule Signed-off-by: GuoMinJ <newexplorerj@gmail.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Usb: Fix various typosAntoine Coeur2020-02-108-17/+17
| | | | | | | | | | | | | Fix various typos in comments and documentation. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-23-philmd@redhat.com>
* MdeModulePkg/UsbBus: Fix various typosAntoine Coeur2020-02-1012-27/+27
| | | | | | | | | | | | | Fix various typos in comments and documentation. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-22-philmd@redhat.com>
* MdeModulePkg/UsbMouse: Fix few typosAntoine Coeur2020-02-106-6/+6
| | | | | | | | | | | | | Fix few typos in comments and documentation. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-21-philmd@redhat.com>
* MdeModulePkg/UsbMass: Fix various typosAntoine Coeur2020-02-108-14/+14
| | | | | | | | | | | | | Fix various typos in comments and documentation. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-20-philmd@redhat.com>
* MdeModulePkg/UsbBusDxe: Fix a typoPhilippe Mathieu-Daudé2020-02-101-1/+1
| | | | | | | | | | | | Correctly write 'malformatted'. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-19-philmd@redhat.com> [lersek@redhat.com: replace EFI_D_xxx w/ DEBUG_xxx to shut up PatchCheck]
* MdeModulePkg/Bus/Sd: Fix various typosAntoine Coeur2020-02-1013-33/+33
| | | | | | | | | | | | | Fix various typos in comments and documentation. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-16-philmd@redhat.com>
* MdeModulePkg/Bus/Scsi: Fix various typosAntoine Coeur2020-02-104-26/+26
| | | | | | | | | | | | | Fix various typos in comments and documentation. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-15-philmd@redhat.com>
* MdeModulePkg/Bus/Isa: Fix various typosAntoine Coeur2020-02-1011-37/+37
| | | | | | | | | | | | | Fix various typos in documentation, comments and debug strings. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-14-philmd@redhat.com>
* MdeModulePkg/Bus/I2c: Fix few typosAntoine Coeur2020-02-103-5/+5
| | | | | | | | | | | | | Fix few typos in comments and documentation. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-13-philmd@redhat.com>
* MdeModulePkg/Bus/Ata: Fix various typosAntoine Coeur2020-02-1013-45/+45
| | | | | | | | | | | | | | Fix various typos in documentation, comments and debug strings. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-12-philmd@redhat.com> [lersek@redhat.com: replace EFI_D_xxx w/ DEBUG_xxx to shut up PatchCheck]
* MdeModulePkg/SdMmcPciHcDxe: Add retries for async commandsAlbecki, Mateusz2020-01-191-2/+4
| | | | | | | | | | | | | This patch adds retries for async execution for commands that failed due to the CRC errors. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Add retries for sync commandsAlbecki, Mateusz2020-01-193-30/+59
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1140 To increase the resiliency driver will now attempt to retry the commands that failed due to the CRC error up to 5 times. This should address the problems with the commands that fail due to random condition on links. This should also help the boards on which CMD13 is particularly unstable after switching the link frequency. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Refactor command error detectionAlbecki, Mateusz2020-01-191-75/+140
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1140 Error detection function will now check if the command failure has been caused by one of the errors that can appear randomly on link(CRC error + end bit error). If such an error has been a cause of failure, function will return EFI_CRC_ERROR instead of EFI_DEVICE_ERROR to indicate to the higher level that command has a chance of succeeding if resent. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Fix DAT lane SW resetAlbecki, Mateusz2020-01-191-2/+2
| | | | | | | | | | | | | | | Driver used to reset the DAT lane on a current error which is not required according to SD specification(it's not going to help). This patch will reset the DAT lane only on DAT lane specific errors. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Fix unknown doxygen tag errorAlbecki, Mateusz2020-01-132-2/+2
| | | | | | | | Changed @rtval to @retval in SdMmcHcStartSdClock function description. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/UsbMouseAbsolutePointer: Fix endpoint selectionMrChromebox2020-01-061-2/+3
| | | | | | | | | | | | | | | The endpoint selected by the driver needs to not only be an interrupt type, but have direction IN as required to set up an asynchronous interrupt transfer. Currently, the driver assumes that the first INT endpoint will be of type IN, but that is not true of all devices, and will silently fail on devices which have the OUT endpoint before the IN. Adjust the endpoint selection loop to explictly check for direction IN. Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Usb/UsbMouse: Fix endpoint selectionMrChromebox2020-01-061-2/+3
| | | | | | | | | | | | | | | | The endpoint selected by the driver needs to not only be an interrupt type, but have direction IN as required to set up an asynchronous interrupt transfer. Currently, the driver assumes that the first INT endpoint will be of type IN, but that is not true of all devices, and will silently fail on devices which have the OUT endpoint before the IN. Adjust the endpoint selection loop to explictly check for direction IN. Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: GuoMinJ <newexplorerj@gmail.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Usb/EfiKey: Fix endpoint selectionMrChromebox2020-01-061-2/+3
| | | | | | | | | | | | | | | | | | The endpoint selected by the driver needs to not only be an interrupt type, but have direction IN as required to set up an asynchronous interrupt transfer. Currently, the driver assumes that the first INT endpoint will be of type IN, but that is not true of all devices, and will silently fail on devices which have the OUT endpoint before the IN. Adjust the endpoint selection loop to explictly check for direction IN. Test: detachable keyboard on Google Pixel Slate now works. Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: GuoMinJ <newexplorerj@gmail.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Add function to start SD clockAlbecki, Mateusz2020-01-063-12/+47
| | | | | | | | | | | | | | | | | | In SD card voltage switch flow we used to redo the entire internal clock setup after voltage switch. Since internal clock has already been setup this is wasting time on polling the internal clock stable. This commit changes it to only start the SD clock. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Tested-by: Marcin Wojtas <mw@semihalf.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Hook SwitchClockFreq after SD clock startAlbecki, Mateusz2020-01-065-142/+81
| | | | | | | | | | | | | | | | | | | | For eMMC modules we used to notify the platform about frequency change only after sending CMD13 which meant that platform might not get a chance to apply required post frequency change fixes to get the clock stable. To fix this notification has been moved to SdMmcHcClockSupply function just after we start the SD clock. During first time setup the notification won't be sent to avoid changing old behavior. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Tested-by: Marcin Wojtas <mw@semihalf.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-16 06:38:44 +0000