summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h
Commit message (Expand)AuthorAgeFilesLines
* drm/amd/display: Add missing dcn35 RCO registersDaniel Miess2023-12-061-0/+32
* drm/amd/display: Enable DCN clock gating for DCN35Daniel Miess2023-11-171-1/+5
* drm/amd/display: Update DCN20 for DCN35 supportQingqing Zhuo2023-08-301-0/+64
* drm/amd/display: Trigger DIO FIFO resync on commit streamsSaaem Rizvi2023-06-091-1/+3
* drm/amd/display: add dscclk instance offset checkCharlene Liu2023-04-111-0/+8
* drm/amd/display: Implement workaround for writing to OTG_PIXEL_RATE_DIV registerSaaem Rizvi2023-03-221-1/+2
* drm/amd/display: update dccg based on HW deltaCharlene Liu2022-09-191-0/+1
* drm/amd/display: Add dependant changes for DCN32/321Aurabindo Pillai2022-06-031-1/+33
* drm/amd/display: Disable physym clockDavid Galiffi2022-01-251-2/+6
* drm/amd/display: Fix disabling dccg clocksDavid Galiffi2022-01-251-0/+7
* drm/amd/display: Disable hdmistream and hdmichar clocksJake Wang2021-10-191-2/+7
* drm/amd/display: Disable dpstreamclk, symclk32_se, and symclk32_leJake Wang2021-10-191-1/+14
* drm/amd/display: Disable dsc root clock when not being usedJake Wang2021-10-191-1/+15
* drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCNAlex Deucher2021-06-221-8/+0
* drm/amd/display: Add interface for ADD & DROP PIXEL RegistersWesley Chalmers2021-06-081-5/+47
* drm/amd/display: Add Interface to set FIFO ERRDET SW OverrideWesley Chalmers2021-06-081-3/+26
* drm/amd/display: Add DCN3.1 DCCGNicholas Kazlauskas2021-06-041-0/+54
* drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Alex Deucher2020-11-041-8/+0
* drm/amd/display: Add DCN3 DCCGBhawanpreet Lakha2020-07-011-0/+22
* drm/amd/display: Revert fixup DPP programming sequenceWesley Chalmers2019-10-031-1/+1
* drm/amd/display: fixup DPP programming sequenceJun Lei2019-08-151-1/+1
* drm/amd/display: Add DCN2 clk mgrHarry Wentland2019-06-211-0/+116