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* drm/msm/dpu: deduplicate some (most) of SSPP sub-blocksDmitry Baryshkov2023-12-051-2/+2
| | | | | | | | | | As we have dropped the variadic parts of SSPP sub-blocks declarations, deduplicate them now, reducing memory cruft. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/570112/ Link: https://lore.kernel.org/r/20231201234234.2065610-7-dmitry.baryshkov@linaro.org
* drm/msm/dpu: shift IRQ indices by 1Dmitry Baryshkov2023-10-091-1/+0
| | | | | | | | | | | | In order to simplify IRQ declarations, shift IRQ indices by 1. This makes 0 the 'no IRQ' value. Thanks to this change, we do no longer have to explicitly set the 'no interrupt' fields in catalog structures. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/550938/ Link: https://lore.kernel.org/r/20230802100426.4184892-9-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: drop UBWC configurationDmitry Baryshkov2023-08-021-5/+0
| | | | | | | | | | As the DPU driver has switched to fetching data from MDSS driver, we can now drop the UBWC and highest_bank_bit parts of the DPU hw catalog. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/550058/ Link: https://lore.kernel.org/r/20230728213320.97309-7-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop now-unused mdss_irqs field from hw catalogDmitry Baryshkov2023-08-021-5/+0
| | | | | | | | | | | Now as the list of the interrupts is constructed from the catalog data, drop the mdss_irqs field from catalog. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/549659/ Link: https://lore.kernel.org/r/20230727144543.1483630-5-dmitry.baryshkov@linaro.org
* drm/msm/dpu: re-introduce dpu core revision to the catalogAbhinav Kumar2023-07-271-0/+6
| | | | | | | | | | | | | | | | | | | Introduce the dpu core revision back as an entry to the catalog so that we can just use dpu revision checks and enable those bits which should be enabled unconditionally and not controlled by a catalog and also simplify the changes to do something like: if (dpu_core_revision > xxxxx && dpu_core_revision < xxxxx) enable the bit; changes in v5: - fix the commit text to remove instances of DPU_HW_VER Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/546801/ Link: https://lore.kernel.org/r/20230712012003.2212-2-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: inline INTF_BLK and INTF_BLK_DSI_TE macrosDmitry Baryshkov2023-07-111-4/+11
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545378/ Link: https://lore.kernel.org/r/20230704022136.130522-18-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline various PP_BLK_* macrosDmitry Baryshkov2023-07-111-3/+9
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545371/ Link: https://lore.kernel.org/r/20230704022136.130522-16-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline LM_BLK macrosDmitry Baryshkov2023-07-111-2/+8
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545362/ Link: https://lore.kernel.org/r/20230704022136.130522-13-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline DSPP_BLK macrosDmitry Baryshkov2023-07-111-2/+6
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545359/ Link: https://lore.kernel.org/r/20230704022136.130522-12-dmitry.baryshkov@linaro.org
* drm/msm/dpu: inline SSPP_BLK macrosDmitry Baryshkov2023-07-111-4/+17
| | | | | | | | | | | | | To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545377/ Link: https://lore.kernel.org/r/20230704022136.130522-11-dmitry.baryshkov@linaro.org
* drm/msm/dpu: correct indentation for CTL definitionsDmitry Baryshkov2023-07-111-4/+4
| | | | | | | | | | | | | Shift dpu_ctl_cfg contents to correct the indentation of CTL blocks. This is done in preparation to expanding the rest of hardware block defines, so that all blocks have similar indentation. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545374/ Link: https://lore.kernel.org/r/20230704022136.130522-10-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop zero features from dpu_mdp_cfg dataDmitry Baryshkov2023-07-111-1/+0
| | | | | | | | | | | Drop useless zero assignments to the dpu_mdp_cfg::features field. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545369/ Link: https://lore.kernel.org/r/20230704022136.130522-8-dmitry.baryshkov@linaro.org
* drm/msm/dpu: expand .clk_ctrls definitionsDmitry Baryshkov2023-07-111-2/+4
| | | | | | | | | | | | Use more standard initialisation for .clk_ctrls definitions. Define a single .clk_ctrls field and use array init inside. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545368/ Link: https://lore.kernel.org/r/20230704022136.130522-7-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop enum dpu_mdp and MDP_TOP valueDmitry Baryshkov2023-07-111-1/+1
| | | | | | | | | | | | Since there is always just a single MDP_TOP instance, drop the enum dpu_mdp and corresponding index value. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545357/ Link: https://lore.kernel.org/r/20230704022136.130522-6-dmitry.baryshkov@linaro.org
* drm/msm/dpu: drop dpu_mdss_cfg::mdp_count fieldDmitry Baryshkov2023-07-111-5/+2
| | | | | | | | | | | There is always a single MDP TOP block. Drop the mdp_count field and stop declaring dpu_mdp_cfg instances as arrays. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545355/ Link: https://lore.kernel.org/r/20230704022136.130522-5-dmitry.baryshkov@linaro.org
* drm/msm/dpu: always use MSM_DP/DSI_CONTROLLER_nDmitry Baryshkov2023-07-111-1/+1
| | | | | | | | | | | | | In several catalog entries we did not use existing MSM_DP_CONTROLLER_n constants. Fill them in. Also use freshly defined MSM_DSI_CONTROLLER_n for DSI interfaces. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545353/ Link: https://lore.kernel.org/r/20230704022136.130522-3-dmitry.baryshkov@linaro.org
* drm/msm/dpu1: Rename sm8150_dspp_blk to sdm845_dspp_blkKonrad Dybcio2023-07-111-1/+1
| | | | | | | | | | | | | | | SDM845 was the first SoC to include both PCC v4 and GC v1.8. We don't currently support any other blocks but the common config for these two can be reused for a large amount of SoCs. Rename it to indicate the origin of that combo. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/533003/ Link: https://lore.kernel.org/r/20230420-topic-dpu_gc-v1-1-d9d1a5e40917@linaro.org [DB: also applied to new catalog files] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: remove unused INTF_NONE interfacesDmitry Baryshkov2023-06-161-1/+0
| | | | | | | | | | | sm6115, sm6375 and qcm2290 do not have INTF_0. Drop corresponding interface definitions. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/542180/ Link: https://lore.kernel.org/r/20230613001004.3426676-4-dmitry.baryshkov@linaro.org
* drm/msm/dpu: Remove intr_rdptr from DPU >= 5.0.0 pingpong configMarijn Suijten2023-05-221-1/+1
| | | | | | | | | | | | Now that newer DPU platforms use a readpointer-done interrupt on the INTF block, stop providing the unused interrupt on the PINGPONG block. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/534238/ Link: https://lore.kernel.org/r/20230411-dpu-intf-te-v4-22-27ce1a5ab5c6@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: Add TEAR-READ-pointer interrupt to INTF blockMarijn Suijten2023-05-221-3/+5
| | | | | | | | | | | | | | | All SoCs since DPU 5.0.0 have the tear interrupt registers moved out of the PINGPONG block and into the INTF block. The new interrupts are described in dpu_hw_interrupts.c, now wire them up in individual SoC catalog files by setting the intr_tear_rd_ptr to the IRQ index spcified in the offset table and enabling this set of DPU interrupts via the mdss_irqs bitmask. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/534236/ Link: https://lore.kernel.org/r/20230411-dpu-intf-te-v4-19-27ce1a5ab5c6@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: Factor out shared interrupt register in INTF_BLK macroMarijn Suijten2023-05-221-2/+4
| | | | | | | | | | | | | | | | As the INTF block is going to attain more interrupts that don't share the same MDP_SSPP_TOP0_INTR register, factor out the _reg argument for the caller to construct the right interrupt index (register and bit index) to not make the interrupt bit arguments depend on one of multiple interrupt register indices. This brings us more in line with how PP_BLK specifies its interrupts and allows for better wrapping in the arrays. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/534222/ Link: https://lore.kernel.org/r/20230411-dpu-intf-te-v4-17-27ce1a5ab5c6@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: Disable pingpong TE on DPU 5.0.0 and aboveMarijn Suijten2023-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Since hardware revision 5.0.0 the TE configuration moved out of the PINGPONG block into the INTF block. Writing these registers has no effect, and is omitted downstream via the DPU/SDE_PINGPONG_TE feature flag. This flag is only added to PINGPONG blocks used by hardware prior to 5.0.0. The existing PP_BLK_TE macro has been removed in favour of directly passing this feature flag, which has thus far been the only difference with PP_BLK. PP_BLK_DITHER has been left in place as its embedded feature flag already excludes this DPU_PINGPONG_TE bit and differs by setting the block length to zero, as it only contains a DITHER subblock. The code that writes to these registers in the INTF block will follow in subsequent patches. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/534240/ Link: https://lore.kernel.org/r/20230411-dpu-intf-te-v4-14-27ce1a5ab5c6@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: Remove unused INTF0 interrupt mask from SM6115/QCM2290Marijn Suijten2023-04-261-1/+0
| | | | | | | | | | | | | | | Neither of these SoCs has INTF0, they only have a DSI interface on index 1. Stop enabling an interrupt that can't fire. Fixes: 3581b7062cec ("drm/msm/disp/dpu1: add support for display on SM6115") Fixes: 5334087ee743 ("drm/msm: add support for QCM2290 MDSS") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/534204/ Link: https://lore.kernel.org/r/20230411-dpu-intf-te-v4-1-27ce1a5ab5c6@somainline.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
* drm/msm/dpu: fetch DPU configuration from match dataDmitry Baryshkov2023-04-071-1/+1
| | | | | | | | | | | | In email discussion it was noted that there can be different SoC device having slightly different SoC features, but sharing the same DPU hw revision. Stop fetching catalog data using core_rev and use platform's match data instead. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/530891/ Link: https://lore.kernel.org/r/20230404130622.509628-42-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: inline IRQ_n_MASK definesDmitry Baryshkov2023-04-071-1/+5
| | | | | | | | | | | IRQ masks are rarely shared between different DPU revisions. Inline them to the dpu_mdss_cfg intances and drop them from the dpu_hw_catalog.c Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/530875/ Link: https://lore.kernel.org/r/20230404130622.509628-36-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
* drm/msm/dpu: split QCM2290 catalog entry to the separate fileDmitry Baryshkov2023-04-071-0/+115
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/530837/ Link: https://lore.kernel.org/r/20230404130622.509628-14-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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