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* Documentation: Update Makefile .inc references to .mkMartin Roth2024-01-262-6/+6
| | | | | | | | | Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I464170e60a22f39225044c6794d091455d931e9c Reviewed-on: https://review.coreboot.org/c/coreboot/+/80128 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* Documentation/getting_started: Add a FAQ documentMartin Roth2024-01-062-0/+313
| | | | | | | | | | Signed-off-by: Martin Roth <gaumless@gmail.com> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Change-Id: Ia324e4800bf9dfc7ad86f4f99272c87ac566304e Reviewed-on: https://review.coreboot.org/c/coreboot/+/79441 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/kconfig: Uprev to Linux 6.6's kconfigPatrick Georgi2023-11-251-7/+3
| | | | | | | | | | | | | | | | | | Upstream reimplemented KCONFIG_STRICT, just calling it KCONFIG_WERROR. Therefore, adapt our build system and documentation. Upstream is less strict at this time, but there's a proposed patch that got imported. TEST=`util/abuild/abuild -C` output (config.h and config.build) remains the same. Also, the failure type fixed in https://review.coreboot.org/c/coreboot/+/11272 can be detected, which I tested by manually breaking our Kconfig in a similar way. Change-Id: I322fb08a2f7308b93cff71a5dd4136f1a998773b Signed-off-by: Patrick Georgi <patrick@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79259 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
* docs: Mention add_intermediate and provide an exampleSimon Glass2023-08-261-0/+17
| | | | | | | | | | | | | This is a useful feature, so add a note about it. Change-Id: If29f6480f878bdaf877dc208cc4861b884e10840 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77342 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77465 Tested-by: Patrick Georgi <patrick@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
* Documentation: fix link to Driver Devicetree Entries pageMarshall Dawson2023-06-091-1/+1
| | | | | | | | | | | Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I08057576c23cef0343816c3b14c48db77b8dc416 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75695 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
* Docs/architecture: Fix filename for coreboot architecture diagramNicholas Chin2022-10-102-0/+0
| | | | | | | | | | | | | A spelling mistake in the markdown reference to the coreboot vs EDK II bootflow diagram was previously fixed, but the actual filename was not changed resulting in a broken reference. Change-Id: I512646e9af312ba2e1db8f597f6fffa8d54a3515 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67782 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* Documentation: split devicetree driver hookup into separate pageMatt DeVillier2022-09-231-205/+2
| | | | | | | | | | | | | Move the devicetree driver example into a separate page under the drivers category, and link to it from both the devicetree page and the drivers index page. This makes more sense from a grouping perspective and makes the info easier to find. Change-Id: Ic3ca80b93a0020737c7ccb5313a0877172022e1a Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67762 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* Documentation: Move devicetree documentationMarc Jones2022-09-012-0/+291
| | | | | | | | | | | | Move devicetree.md from acpi/ to getting_started/. The devicetree has nothing to do with ACPI and getting_started has the most similar information about coreboot. Change-Id: I873b293f036a9e3bcdc98135386f9158c645513c Signed-off-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66916 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Documentation: Fix a few spelling issuesMartin Roth2022-05-301-1/+1
| | | | | | | | | Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I47add663f3021170b840203ce229acf836b7a1c4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* tpm: Refactor TPM Kconfig dimensionsJes B. Klinke2022-04-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of these is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* Documentation: gpio: Provide minor fixes to the tableSubrata Banik2022-03-301-7/+7
| | | | | | | | | | | | | | This patch fixes the table issue in markdown file identified with commit 96481066 (Documentation: gpio: Update table as per coreboot guidelines). BUG=b:211573253, b:211950520 Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ifd8265b92b5ef0dcabb754371591477ca19c39be Reviewed-on: https://review.coreboot.org/c/coreboot/+/63177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* Documentation: gpio: Update table as per coreboot guidelinesSubrata Banik2022-03-291-26/+55
| | | | | | | | | | | | | This patch fixes the table issue in markdown file introduced with commit 5338a16b (Documentation: gpio: Fix table). BUG=b:211573253, b:211950520 Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ic4f27f46a9d219098612d8b7747ae26116506fce Reviewed-on: https://review.coreboot.org/c/coreboot/+/63126 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
* Documentation: Move documentation license to main menuFelix Singer2022-03-242-165/+0
| | | | | | | | | | | | | The "Getting started" section is not an appropriate place for the documentation license. It should rather be listed in the main menu. Thus, move it there. Change-Id: I8bfc4f52da8a93d78a62e3a68fd6f1dc8ae4d335 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
* Documentation: Fix broken link to Gerrit GuidelinesFelix Singer2022-02-281-1/+1
| | | | | | | | | Change-Id: I14084f95af122c160f287f0133017a769c249d00 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62422 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* Documentation: Move Gerrit Guidelines to "Contributing" sectionFelix Singer2022-02-272-369/+0
| | | | | | | | | | | | | The Gerrit Guidelines are related to the contributing process and also contain documentation which goes beyond "Getting started". Thus, move them to the "Contributing" section. Change-Id: I775a79c14562a1f4a9563012aee3b690c0635cc1 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62386 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Documentation: gpio: Fix tableSubrata Banik2022-01-181-53/+26
| | | | | | | | | | | | | | This patch fixes the indentation issue introduced with commit 0c1c2dec (Documentation: Capture anomalies between pad and lock reset type). BUG=b:211573253, b:211950520 Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ib6974cda26e6f7968688a2a7c30c7351d212a780 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61107 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Documentation: Capture anomalies between pad and lock reset typeSubrata Banik2022-01-131-0/+74
| | | | | | | | | | | | | | | | | | | This patch documents the recommendation as per Intel GPIO BWG on GPIO PAD lock configuration. As per GPIO BWG, it's recommended to change the Pad Reset Config for lock GPP as `Power Good` so that pad configuration and lock bit can be reset at the same time. Refer to Intel doc:630603 for details. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I3faf5dfc28c8c2dbc322db80a59f44a29002673c Reviewed-on: https://review.coreboot.org/c/coreboot/+/61000 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
* Documentation: Add warning about "private" changes on GerritPatrick Georgi2021-11-221-2/+4
| | | | | | | | | | | | Private changes on Gerrit are a tricky beast in that they're well hidden in the UI and a few other places but still reachable under certain circumstances. Change-Id: I1c8c6cccfd023bc1d839dc5d9544204c88f89c7e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59229 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* Documentation: Fix spelling errorsMartin Roth2021-10-052-3/+3
| | | | | | | | | | | | These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Documentation/util/kconfig: Remove silentoldconfigYu-Ping Wu2021-08-161-1/+1
| | | | | | | | | | | | | | | The "silentoldconfig" target has been removed in Linux 5.13's kconfig (CB:37152). As explained by Michal Marek at https://lkml.org/lkml/2011/8/31/189, the "silentoldconfig" target has become an internal interface and "oldconfig" is just as silent now. Therefore, correct the target for syntax checking. Change-Id: I8416bd4a96d15415f46c591ceb26ebb29aef1ab0 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56878 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
* util/kconfig: Uprev to Linux 5.13's kconfigPatrick Georgi2021-07-131-4/+0
| | | | | | | | | | | | | | | | | | | | | | | This was originally several commits that had to be squashed into one because the intermediate states weren't able to build coreboot: - one to remove everything that wasn't our own code, leaving only regex.[ch], toada.c, description.md and Makefile.inc. - one to copy in Linux 5.13's scripts/kconfig and adapt Makefile.inc to make the original Makefile work again. - adapt abuild to use olddefconfig, simplifying matters. - apply patches in util/kconfig/patches. - Some more adaptations to the libpayload build system. The patches are now in util/kconfig/patches/, reverse applying them should lead to a util/kconfig/ tree that contains exactly the Linux version + our own 5 files. Change-Id: Ia0e8fe4e9022b278f34ab113a433ef4d45e5c355 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37152 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* Documentation/gerrit: Describe core developer responsibilitiesPatrick Georgi2021-05-171-0/+12
| | | | | | | | | Change-Id: I8885e9fb401838229ead72b97394f3e2343aabed Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52951 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Martin Roth <martinroth@google.com>
* docs: add recommendation for gpios regarding soft strapsMichael Niewöhner2021-05-111-7/+16
| | | | | | | | | | | | | | | | | Soft straps, that can be configured by the vendor in the Intel Flash Image Tool (FIT), can influence some pads' default state. It is possible to select either a native function or GPIO mode for some pads on non-server SoCs, while on server SoCs most pads can be controlled. Thus, add a recommendation to always configure all pads for a board to guarantee integrity between different board or vendor firmware revisions where the soft straps might have been changed. Change-Id: I33063a3f6a1c9cd5267d85f7da84deb554489a26 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* docs: correct and rewrite documentation regarding n/c / unused padsMichael Niewöhner2021-05-111-6/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel PDGs starting from Skylake / Sunrise Point state that, different from the general recommendation in digital electronics, unconnected GPIOs defaulting to GPIO mode do explicitly not require termination. The reason for this is, that these GPIOs have the `GPIORXDIS` bit set, which effectively disconnects the pad from the internal logic by disabling the input buffer. This bit - besides `GPIOTXDIS` - can also be set explicitly by using the gpio macro `PAD_NC(pad, NONE)`. In some cases, a pull resistor may be required due to bad board design or when a vendor sets the RX/TX disable bits together with a pull resistor and schematics are not available to check if the pad is really unconnected or just unused. In this case the pull resistor should be kept. Pads defaulting to native functions usually don't need special handling. However, when pads requiring external pull-ups are missing these due to bad board design, they should be configured with `PAD_NC` to disconnect them internally. Rewrite the documentation to reflect these new findings. Also clarify the comment in soc/intel gpio code accordingly. Change-Id: Id01b197ebe8f2b8bb4ecf3d119ec2298b26d9be0 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52139 Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Documentation/gerrit: Document our Gerrit user roles and proceduresPatrick Georgi2021-05-091-0/+29
| | | | | | | | | | | | Document the roles we have on review.coreboot.org, the expectations associated with them, and how to become part of any of these groups. Change-Id: Ib31083f5a07bd89efd13ecd6aaf34a69d438d59d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52265 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* device: Add unit to Kconfig option name: `PRE_GRAPHICS_DELAY_MS`Paul Menzel2021-02-151-1/+1
| | | | | | | | | | | It’s good practice to put the unit into the name. Change-Id: I1493f61d4e495c22f09abf1829bb2eab9b1fd2b6 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50517 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* soc/intel/apl: drop LPC pad configuration codeMichael Niewöhner2021-01-231-0/+10
| | | | | | | | | | | | Drop LPC pad configuration code since all boards now do pad configuration on their own. The comment about LPC_CLKRUNB when using eSPI is moved to `Documentation/getting_started/gpio.md`. Change-Id: I710d6aee8c3b2c8282cd321cd0688b9b26abea07 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49410 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Documentation/getting_started/kconfig.md: Add a note about Kconfig defaultsElyes HAOUAS2020-09-251-0/+2
| | | | | | | | | | | | | | When the declaration is done after the default, menuconfig will see that symbol defined at the first place where kconfig tool will find it. For example, if we run menuconfig and search for 'MAINBOARD_VENDOR', we will see it defined at ""src/mainboard/51nb/Kconfig" which is odd. Change-Id: I215a1817e60e6deb6931679f139d110ba762d3c8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45127 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
* doc/getting_started: update name of file generated by "make savedefconfig"Jonathan Zhang2020-07-291-1/+1
| | | | | | | | | | | Update kconfig.md to reflect that defconfig (instead of mini-config) file is generated by running "make savedefconfig". Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: I4075e5b51e3c504eaad25e3abfc52ba593364ee9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43973 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Documentation: Revise "24 hours wait period" rulesPatrick Georgi2020-07-291-9/+36
| | | | | | | | | | | | They're more or less the same but reworked for hopefully some more clarity. There have been some best practices around documenting the reason for expedited processing so let's make them official, too. Change-Id: I620e48016a1ceda2ac43f26624ed21af01f6a0a5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43484 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIGMaxim Polyakov2020-07-261-5/+0
| | | | | | | | | | | | | | | | | | | | | This macro is not correct because the RX Level/Edge Configuration (trig) and the GPIO Tx/Rx Buffer Disable (bufdis) fields in DW0 register do not affect on the pad in the native function mode. This is part of the patch set "src/mb/*, src/soc/intel/common/gpio: Remove PAD_CFG_NF_BUF_TRIG ": CB:43455 - cedarisland: undo set trig and bufdis for NF pads CB:43454 - tiogapass: undo set trig and bufdis for NF pads CB:43561 - h110m: undo set trig and bufdis for NF pads CB:43569 - soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG Change-Id: Ic0416e3f67016c648f0886df73f585e8a08d4e92 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao Reviewed-by: Michael Niewöhner
* Documentation: Encourage documentation with code changesPatrick Georgi2020-05-201-0/+17
| | | | | | | | | | | | | | | | | The resource allocator woes post-4.12 release showed room for improvement on both discussion and documentation. To encourage this (and encourage reviewers to look out for issues in that space), extend the review guidelines so that they encourage to more clearly document the reason for a change with the change (commit message or our documentation) and also to loop in the mailing list. Change-Id: I1962dba3fe7e1a01fa4c8b0058297c7d050cb7b7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41493 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* Documentation/getting_started: Fix typoPaul Menzel2020-05-121-1/+1
| | | | | | | | Change-Id: I41571c45719dfade49a021b6bafe80afdcb7b581 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41223 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* Documentation: getting_started/gpio.md: fix markupIvan Labáth2020-02-241-1/+1
| | | | | | | | | Change-Id: I2c61770d60a4f290fd8d516850f16bc3808ad48d Signed-off-by: Ivan Labáth <iger@labo.rs> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39082 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* documentation: Add documentation on setting up mainboard GPIOsTim Wawrzynczak2020-01-182-0/+137
| | | | | | | | | | | | | The new documentation describes typical ways that mainboards will set up their GPIOs, as well as the distinction between "early" and "normal" GPIOs. It also describes the typical properties that GPIO configuration will cover. Change-Id: I279eec4ed2bb0248a2bdb363fb73b40b8272267f Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Documentation: document non-Docker sphinx installation and usageFelix Held2020-01-141-2/+19
| | | | | | | | | | | Also update the known-good versions of the needed tools. Change-Id: I0f63860beb0a8a00360752318236e302c7170977 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37952 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Documentation/writing_documentation.md: Explain how to use dockerArthur Heymans2019-10-271-1/+23
| | | | | | | | | | | | Using docker to build to documentation eases the process of building the documentation. Given that some versions of sphinx are incompatible, the option to use docker is presented first. Change-Id: I6c18f81a829364ada1859c04ba2dc4f886934bcc Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36105 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Documentation: Fix typoPatrick Georgi2019-10-221-2/+2
| | | | | | | | Change-Id: Ic208ae7ae38565cf97023adba3639fa12b83a21e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36191 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* Documentation/writing_documentation.md: Fix typoArthur Heymans2019-10-211-1/+1
| | | | | | | | Change-Id: I18483332324ddfa45bc37a58c169901910e5a0cb Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* Documentation: Fix typoPatrick Georgi2019-10-071-1/+1
| | | | | | | | Change-Id: I832ff41a322081d3bae80df463659ec6ffffcd34 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35814 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* Documentation: minor grammar fixesPatrick Georgi2019-09-161-3/+3
| | | | | | | | | | Change-Id: Iff6df888a293b525d436a5be215e8972ae2dd46a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao <lance.zhao@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Kconfig: Write tmp files into same directory as target filesRaul E Rangel2019-08-301-3/+0
| | | | | | | | | | | | | | | | | | | This removes the need for COREBOOT_BUILD_DIR in Kconfig. Since the original files will be replaced with the tmp file, the parent directory already needs to be writable. Before this change, the tmp files would be created in the CWD (src) if COREBOOT_BUILD_DIR was not specified. BUG=b:112267918 TEST=emerge-grunt coreboot and verified no tmp files were created in the src directory. Change-Id: Icdaf2ff3dd1ec98813b75ef55b96e38e1ca19ec7 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34244 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* kconfig: Drop IS_ENABLED() macroNico Huber2019-06-041-2/+0
| | | | | | | | | | | We keep its definition in libpayload, though, to maintain compatibility with existing payload code. For now. Change-Id: I8fc0d0136ba2316ef393c5c17f2b3ac3a9c6328d Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* Documentation: Allow the use of CSVPatrick Rudolph2019-04-111-0/+14
| | | | | | | | | | | | Allow the use of CSV files if properly referenced from markdown. Sphinx will parse the file and create a human readable table, allowing easy integration of autogenerated files. Change-Id: I6fa13acf67ff1c6c9e3985054405c5446808da03 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32251 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* Documentation: Add coreboot architecturePatrick Rudolph2019-04-114-0/+282
| | | | | | | | | | | | | | | Describe the coreboot stages, given a short introduction what is done and add a chart for coreboot's vs EDK II bootflow as well as the source for the SVG. TODO: Describe stages in detail in a separate commit. Change-Id: I98cb61b1d0d29ac9d03f5ef3644d51a8e14bad74 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32123 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
* Docs/kconfig: Update to use CONFIG()Nico Huber2019-04-081-1/+1
| | | | | | | | | Change-Id: Ica7b601d1c9c3bcf39b8b805d48e969f8a944927 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32228 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* Documentation: Fix broken linkPhilipp Bartsch2019-04-041-1/+1
| | | | | | | | | Change-Id: Idd08bc49fb7bf3770e03f747d97d90aacc12eada Signed-off-by: Philipp Bartsch <phil@grmr.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32145 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* Documentation/gerrit: Update parts about WIP and draft commitsPatrick Georgi2019-01-071-5/+9
| | | | | | | | | | | | | Gerrit dropped the "draft" concept and replaced it with private commits and work-in-progress commits, options that can be used independently from each other. Change-Id: I6abe267c2091c750fc234057be3a4e62adb59c4c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/30309 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Documentation: gerrit guidelines: Adopt the new topic syntaxJonathan Neuschäfer2018-12-191-1/+1
| | | | | | | | | | | | When the old syntax is used, gerrit now respends with: remote: WARNING: deprecated topic syntax. Use %topic=TOPIC instead Change-Id: I002bfc3e9c4b348379337bc386d3bdefb307679d Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29983 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Fix typos involving "the the"Jonathan Neuschäfer2018-12-181-1/+1
| | | | | | | | Change-Id: I179264ee6681a7ba4488b9f1c6bce1a19b4e1772 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/30160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-02 21:48:11 +0000