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* mb/google/dedede/var/beadrix: Disable un-used C1 port by daughterboardKevin Yang2024-02-191-0/+18
| | | | | | | | | | | | | | | Probe usb ports by FW_CONFIG setting to disable C1 port on beadrix poin2 new daughterboard without C1 port. BUG=b:316365055 BRANCH=firmware-dedede-13606.B TEST=emerge-dedede coreboot Change-Id: I494a922d2b04dcf7bd35680f5d95f8463e225f2d Signed-off-by: Kevin Yang <kevin.yang@ecs.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80573 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Derek Huang <derekhuang@google.com>
* mb/*/{device,override}tree: Set touchpads to use detect (vs probed) flagMatt DeVillier2022-09-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Historically, ChromeOS devices have worked around the problem of OEMs using several different parts for touchpads/touchscreens by using a ChromeOS kernel-specific 'probed' flag (rejected by the upstream kernel) to indicate that the device may or may not be present, and that the driver should probe to confirm device presence. Since c636142b, coreboot now supports detection for i2c devices at runtime when creating the device entries for the ACPI/SSDT tables, rendering the 'probed' flag obsolete for touchpads. Switch all touchpads in the tree from using the 'probed' flag to the 'detect' flag. Touchscreens require more involved power sequencing, which will be done at some future time, after which they will switch over as well. TEST: build/boot at least one variant for each baseboard in the tree. Verify touchpad works under Linux and Windows. Verify only a single touchpad device is present in the ACPI tables. Change-Id: I47c6eed37eb34c044e27963532e544d3940a7c15 Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67305 Reviewed-by: Sean Rhodes <sean@starlabs.systems> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* mb/google/dedede/var/beadrix: Update SoC gpio pin of BC1.2Teddy Shih2022-08-031-0/+1
| | | | | | | | | | | | | | | | | | | | Update SoC GPIO setting of adding BC1.2 SLGC55545 according to beadrix schematics. GPP_A18 : NC -> NF1 (USB_OC0_N) BUG=b:214393595, b:226294980 BRANCH=None TEST=on beadrix, validated by beadrix's Type A working properly. Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: I746931582cc12f49f7f1c667563350ebac8ddfa1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65377 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com> Reviewed-by: Ivan Chen <yulunchen@google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/dedede/beadrix: Update probe daughter LTE mainboard SARTeddy Shih2022-06-121-2/+4
| | | | | | | | | | | | | | | Update FW_CONFIG probe for daughter board LTE and mainboard SAR according to beadrix schematics. BRANCH=dedede BUG=b:226910787, b:213549229, b:233983127 TEST=on beadrix, validated by beadrix LTE working properly. Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: I126a1c548b6314acc0749fcfbdffd8f482c4f46c Reviewed-on: https://review.coreboot.org/c/coreboot/+/65013 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* mb/google/dedede/beadrix: Add fw_config probe for ALC5682-VD & VSTeddy Shih2022-06-011-1/+25
| | | | | | | | | | | | | | | | | | | | | | ALC5682-VD/ALC5682I-VS load different kernel driver by different hid name. Update hid name depending on the AUDIO_CODEC_SOURCE field of fw_config. Define FW_CONFIG bits 41 - 43 (SSFC bits 9 - 11) for codec selection. ALC5682-VD: _HID = "10EC5682" ALC5682I-VS: _HID = "RTL5682" BRANCH=dedede BUG=b:226910787,b:232057623 TEST=on beadrix, verified by FW_NAME=beadrix emerge-dedede coreboot. Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: I059b750743ab3b29d17c50d0d4301fbae4873acc Reviewed-on: https://review.coreboot.org/c/coreboot/+/64025 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com> Reviewed-by: Ivan Chen <yulunchen@google.com>
* mb/google/dedede/beadrix: Update PCIe and SATA pins for Realtek RTL8822CE ↵Teddy Shih2022-05-191-3/+0
| | | | | | | | | | | | | | | | | | | | | | suspend To make sure Realtek RTL8822CE suspend stress test smoothly, we remove 1c.7 as wireless LAN (WLAN) connects the signal PCIE_4 and it will map to 1c.7. refer to Intel Simon comment (https://partnerissuetracker.corp.google.com/issues/230386474#comment12), as well as, remove redundant 17.0 and 1c.6 that both are described by baseboard/devicetree.cb BRANCH=dedede BUG=b:230386474 TEST=on beadrix, verified by Realtek RTL8822CE can run suspend stress test properly. Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: Ib418eed57f07afaa6b397b42a057808eab142f7a Reviewed-on: https://review.coreboot.org/c/coreboot/+/64212 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ivan Chen <yulunchen@google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* mb/google/dedede/var/beadrix: Add a Proximity Sensor SX9324 for SARTeddy Shih2022-05-051-2/+69
| | | | | | | | | | | | | | | | | To meet LTE's RF Specific Absorption Rate (SAR) certification, we add a Semtech Smart Proximity Sensor (P-Sensor) SX9324. P-Sensor connects EC of I2C 5 bus and GPIO D22, D23, as well as, SoC of GPIO E11, refer to mainboard schematic. BUG=b:213549229 BRANCH=dedede TEST=emerge-dedede coreboot Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: If172d13aa62503547227adf91f049ea50b948888 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63652 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/dedede/beadrix: Update DPTF settingTeddy Shih2022-04-271-6/+6
| | | | | | | | | | | | | | | | Update DPTF Policy and temperature sensor values from thermal team. BRANCH=dedede BUG=b:204229229 TEST=on beadrix, verified by FW_NAME=beadrix emerge-dedede coreboot. Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: I34c1298dc8412121f8688842bb8d69d7fafa46f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63824 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ivan Chen <yulunchen@google.com> Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/dedede/var/beadrix: Update PCIe and SATA pins for low power ↵Teddy Shih2022-04-071-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | consumption To achieve low power consumption, we disable unused PCIe and SATA pins at beadrix/overridetree.cb according to baseboard/devicetree.cb and mainboard schematic. Original measured beadrix board's power consumption is about 250 mW. After we disable unused PCIe and SATA pins, as well as, enable the other low power MUX CL (3487086: USB MUX: Update low power mode of MUX anx7447 used as MUX only | https://chromium-review.googlesource.com/c/chromiumos/platform/ec/ +/3487086), the measured power consumption achieves about 110 ~ 116 mW, as well as, meets Google battery life for 14 days in the suspend state and Intel low power consumption about 116 mW. BRANCH=dedede BUG=b:204882915 TEST=on beadrix, measured power consumption meets Intel power consumption. Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: I79ec524c5ce8f2a79da4aeba084786fb9dac17af Reviewed-on: https://review.coreboot.org/c/coreboot/+/62776 Reviewed-by: Teddy Shih <teddyshihau@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Ivan Chen <yulunchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/dedede/var/beadrix: Enable LTE function by FW_CONFIG optionTeddy Shih2022-03-231-1/+3
| | | | | | | | | | | | | | | | | Enable/disable LTE function based on LTE field of FW_CONFIG. 1. GPIO control 2. USB port setting BUG=b:213582491 BRANCH=dedede TEST=FW_NAME=beadrix emerge-dedede coreboot Change-Id: Icea44992e2e3195d1fd9a888f5ce4650f82280bb Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62801 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/dedede: Update DPTF settingTeddy Shih2022-03-141-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update PL1, PL2, and temperature sensor values from thermal team, as well as, we remove unused temperature sensors according to baseboard/devicetree.cb and mainboard schematic. After we check DTT setting, the thermal and performance test pass. BRANCH=dedede BUG=b:204229229 TEST=on beadrix, run following commands: localhost /tmp # cat /sys/class/thermal/thermal_zone*/type x86_pkg_temp INT3400 Thermal TSR0 TSR1 TCPU localhost /tmp # cat /sys/class/thermal/thermal_zone*/temp 45000 20000 32800 32800 39000 Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: Ibc59c4aa431f600158e744f5bbdc6d59a07a1ef3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62729 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/dedede/var/beadrix: Add LTE modem supportTeddy Shih2022-02-121-0/+10
| | | | | | | | | | | | | | | This change adds LTE modem for beadrix. BUG=b:204882915 BRANCH=dedede TEST=Build and boot beadrix, check with command modem status Change-Id: I7acb88634478ff486810b2c3fc14d6739c3268e1 Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61328 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Revert "mb/google/dedede/var/beadrix: Remove SD controller"Teddy Shih2022-01-171-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit bcd7873ea80be0ee576a10e6a11b7dcf8294ffb5. Reason for revert: It makes beadrix can't boot to os without depthcharge change. The depthcharge change related with fw_config and will effect other variants. ================ error log ================ ... Starting depthcharge on Beadrix... src/vboot/util/flag.c:50 flag_install(): Gpio already set up for flag 5. =========================================== BUG=b:204882915 BRANCH=None TEST=Build and boot into OS. Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: Id5e76fc78a56d30caf9f805a8a430f176a653bbe Reviewed-on: https://review.coreboot.org/c/coreboot/+/60849 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Raymond Chung <raymondchung@ami.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Henry Sun <henrysun@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/dedede/var/beadrix: Remove SD controllerTeddy Shih2021-12-231-0/+1
| | | | | | | | | | | | | | Remove SD controller configurations based on the beadrix's schematic. BUG=b:204882915 BRANCH=None TEST=Built test coreboot image Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: Iba6f5cbbe90d9307e5e8080d7063a1881acd7ed9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60266 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/dedede/var/beadrix: Add internal USB camera supportTeddy Shih2021-12-231-0/+15
| | | | | | | | | | | | | | This change adds internal USB camera into devicetree for beadrix. BUG=b:204882915, b:210772511 BRANCH=None TEST=Built and checked camera device existence with lsusb Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: Iddc58c0d27d5da0fa4652f503f15ebb308be18c7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60252 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/dedede/var/beadrix: Enable audio featureTeddy Shih2021-12-231-0/+20
| | | | | | | | | | | | | | This change adds ALC5682I audio codec and MAX98360A amplifier for beadrix. BUG=b:204882915, b:210756131 BRANCH=None TEST=Built and heared speaker sound on OS Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: I6f12f71ec66acd420471ab9a7612b1821650ad54 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60250 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/dedede/var/beadrix: Enable PIXA touchpadTeddy Shih2021-12-231-1/+11
| | | | | | | | | | | | | | This change adds PIXA touchpad into devicetree for beadrix. BUG=b:204882915, b:203113111 TEST=Built and verified touchpad function Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: I0b551554c69d52f0559ace4ad9c1335270dacea9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60246 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/dedede: Create beadrix variantTeddy Shih2021-12-031-0/+42
Create the beadrix variant of the waddledee reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:204882915 BRANCH=None TEST=util/abuild/abuild -p none -t google/dedede -x -a make sure the build includes GOOGLE_BEADRIX Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: Ie08cbc19967eca8ba31ea3203e71c4e1fef044d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59302 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-10 21:17:57 +0000