coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	arch/x86: consolidate HPET base address definitions	Felix Held	2022-02-25	1	-5/+0
*	arch/x86: factor out and commonize HPET_BASE_ADDRESS definition	Felix Held	2022-02-25	1	-1/+1
*	soc/amd/*/include/soc/iomap.h: rework HPET base address check	Felix Held	2022-02-24	1	-3/+3
*	psp_verstage: convert relative address in EFS2	Kangheui Won	2021-11-02	1	-2/+2
*	soc/amd/common/block/i2c: implement proper read_resource	Felix Held	2021-10-15	1	-5/+0
*	soc/amd/cezanne/include/soc/iomap: add eMMC MMIO base addresses	Felix Held	2021-06-16	1	-0/+3
*	soc/amd/cezanne,picasso/include/soc/iomap: reflow I2C_DEVICE_COUNT	Felix Held	2021-06-16	1	-2/+1
*	soc/amd/cezanne: remove warm reset flag code	Felix Held	2021-06-11	1	-1/+0
*	soc/amd/cezanne/include/iomap: properly align defines	Felix Held	2021-06-01	1	-1/+1
*	soc/amd/cezanne: add GNB IOAPIC support	Felix Held	2021-05-09	1	-0/+2
*	soc/amd/cezanne: fix i2c compiler errors on non-x86	Kangheui Won	2021-04-23	1	-5/+5
*	soc/amd/cezanne: Get I2C specific code for cezanne	Zheng Bao	2021-03-22	1	-0/+11
*	soc/amd/cezanne/acpi: Add MMIO devices	Raul E Rangel	2021-02-22	1	-0/+9
*	soc/amd/cezanne/include/iomap: add HPET base address	Felix Held	2021-02-14	1	-0/+6
*	soc/amd/cezanne: Enable early LPC support in bootblock stage	Zheng Bao	2021-02-09	1	-0/+1
*	soc/amd/cezanne/iomap: move MMIO range comment above MMIO ranges	Felix Held	2021-02-05	1	-1/+1
*	soc/amd/cezanne/fch: add ACPI I/O port setup	Felix Held	2021-02-05	1	-0/+10
*	soc/amd/cezanne: add console UART support	Felix Held	2021-01-14	1	-0/+8
*	soc/amd/cezanne: add caching setup in bootblock	Felix Held	2020-12-13	1	-0/+3
*	soc/amd/cezanne: add 0xcf9 reset	Felix Held	2020-12-11	1	-1/+2
*	soc/amd/cezanne: add common SMBus code to build	Felix Held	2020-12-09	1	-0/+9