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path: root/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
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* UefiPayloadPkg: Return PciRootBridges instead of NULLKavya2022-08-231-2/+2
| | | | | | | | | | Return PciRootBridges instead of NULL and set PcdPciDisableBusEnumeration to FALSE when root bridge count is zero. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: Kavya <k.kavyax.sravanthi@intel.com>
* UefiPayloadPkg: Fix PciHostBridgeLibLean Sheng Tan2022-04-101-4/+9
| | | | | | | | | | | | | | | | | | | | | Don't assume a 64bit register always holds an address greater than 4GB. Check the value in the register and decide which Aperature it should be assigned to. Fixes assertion "ASSERT [PciHostBridgeDxe] Bridge->MemAbove4G.Base >= 0x0000000100000000ULL". Tested with coreboot as bootloader on platforms that have PCI resource above 4GiB and on platforms that don't have resource above 4GiB. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by Sean Rhodes <sean@starlabs.systems> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix PciHostBridgeLibPatrick Rudolph2022-03-291-119/+18
| | | | | | | | | | | | | | | | | | | | | | | | On modern platforms with TBT devices the coreboot resource allocator opens large PCI bridge MMIO windows above 4GiB to place hotplugable PCI BARs there as they won't fit below 4GiB. In addition modern GPGPU devices have very big PCI bars that doesn't fit below 4GiB. The PciHostBridgeLib made lots of assumptions about the coreboot resource allocator that were not verified at runtime and are no longer true. Remove all of the 'coreboot specific' code and implement the same logic as OvmfPkg's ScanForRootBridges. Fixes assertion "ASSERT [PciHostBridgeDxe] Bridge->Mem.Limit < 0x0000000100000000ULL". Tested with coreboot as bootloader on platforms that have PCI resources above 4GiB and on platforms that don't have resources above 4GiB. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg: Apply uncrustify changesMichael Kubacki2021-12-071-118/+152
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Fix ECC reported issuesGuo Dong2021-10-191-5/+10
| | | | | | | | | | | | | | | V2: Fix more header files on #ifdef variable ECC reported some issues on UefiPayloadPkg, this patch fixed most of them except several files including ElfLib\Elf32.h, coreboot.h, CbParseLib.c, etc. It also removed unused functions in ResetSystemLib and Hob.c. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg: UefiPayload retrieve PCI root bridge from Guid HobZhiguang Liu2021-06-161-1/+72
| | | | | | | | | | | | | | UefiPayload parse gUniversalPayloadPciRootBridgeInfoGuid Guid Hob to retrieve PCI root bridges information. gUniversalPayloadPciRootBridgeInfoGuid Guid Hob should be created by Bootloader. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Tested-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Enhance UEFI payload for coreboot and Slim BootloaderDong, Guo2019-04-151-0/+584
CorebootModulePkg and CorebootPayloadPkg originally supports coreboot only. In order to support other bootloaders, such as Slim Bootloader, they need be updated to be more generic. UEFI Payload (UefiPayloadPkg) a converged package from CorebootModulePkg and CorebootPayloadPkg with following updates: a. Support both coreboot and Slim Bootloader b. Removed SataControllerDxe and BaseSerialPortLib16550 to use EDK2 modules c. Support passing bootloader parameter to UEFI payload, e.g. coreboot table from coreboot or HOB list from Slim Bootloader d. Using GraphicsOutputDxe from EDK2 with minor change instead of FbGop e. Remove the dependency to IntelFrameworkPkg and IntelFrameworkModulePkg and QuarkSocPkg f. Use BaseDebugLibSerialPort library as DebugLib g. Use HPET timer, drop legacy 8254 timer support h. Use BaseXApicX2ApicLib instead of BaseXApicLib i. Remove HOB gUefiFrameBufferInfoGuid to use EDK2 graphics HOBs. j. Other clean ups On how UefiPayloadPkg could work with coreboot/Slim Bootloader, please refer UefiPayloadPkg/BuildAndIntegrationInstructions.txt Once UefiPayloadPkg is checked-in, CorebootModulePkg and CorebootPayloadPkg could be retired. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>