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path: root/drivers/gpu/drm/i915/display/intel_bw.c
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* drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailboxRadhakrishna Sripada2022-09-121-5/+37
* drm/i915: Extract skl_watermark.cVille Syrjälä2022-09-091-1/+3
* drm/i915: move and group max_bw and bw_obj under display.bwJani Nikula2022-08-311-21/+21
* drm/i915: move and group sagv under display.sagvJani Nikula2022-08-291-5/+5
* drm/i915/mtl: Update memory bandwidth parametersRadhakrishna Sripada2022-08-251-3/+37
* drm/i915: fix null pointer dereferenceŁukasz Bartosik2022-08-251-7/+9
* drm/i915/pcode: Extend pcode functions for multiple gt'sAshutosh Dixit2022-05-201-3/+3
* drm/i915: Handle the DG2 max bw properlyVinod Govindapillai2022-03-311-10/+15
* drm/i915: Move intel_vtd_active and run_as_guest to i915_utilsTvrtko Ursulin2022-03-301-1/+2
* drm/i915: Add "maximum pipe read bandwidth" checksVille Syrjälä2022-03-211-5/+31
* drm/i915: Fix DBUF bandwidth vs. cdclk handlingVille Syrjälä2022-03-211-46/+111
* drm/i915: Properly write lock bw_state when it changesVille Syrjälä2022-03-211-1/+23
* drm/i915: Round up when calculating display bandwidth requirementsVille Syrjälä2022-03-211-2/+2
* drm/i915: Nuke intel_bw_calc_min_cdclk()Ville Syrjälä2022-03-211-45/+4
* drm/i915: Split plane data_rate into data_rate+data_rate_yVille Syrjälä2022-03-211-18/+18
* drm/i915: Tweak plane ddb allocation trackingVille Syrjälä2022-03-211-3/+3
* drm/i915: Rename QGV request/response bitsVille Syrjälä2022-03-181-4/+5
* drm/i915: Unconfuses QGV vs. PSF point masksVille Syrjälä2022-03-181-18/+17
* drm/i915: Fix PSF GV point mask when SAGV is not possibleVille Syrjälä2022-03-181-1/+2
* drm/i915: Extract intel_bw_check_data_rate()Ville Syrjälä2022-02-231-21/+34
* drm/i915: Extract icl_qgv_points_mask()Ville Syrjälä2022-02-231-13/+22
* drm/i915: Fix bw atomic check when switching between SAGV vs. no SAGVVille Syrjälä2022-02-181-2/+16
* drm/i915: Move MCHBAR registers to their own headerMatt Roper2022-02-161-0/+1
* drm/i915: Extract skl_crtc_calc_dbuf_bw()Ville Syrjälä2022-02-111-38/+44
* drm/i915: Only include i915_reg.h from .c filesMatt Roper2022-02-021-0/+1
* Merge drm/drm-next into drm-intel-nextRodrigo Vivi2022-01-311-1/+1
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| * Merge tag 'drm-intel-gt-next-2021-12-09' of git://anongit.freedesktop.org/drm...Dave Airlie2021-12-101-1/+1
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| | * drm/i915: Use per device iommu checkTvrtko Ursulin2021-12-011-1/+1
* | | drm/i915/pcode: rename sandybridge_pcode_* to snb_pcode_*Jani Nikula2022-01-131-8/+5
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* | drm/i915: Fix Memory BW formulae for ADL-PRadhakrishna Sripada2021-11-081-1/+1
* | drm/i915: Update memory bandwidth formulaeRadhakrishna Sripada2021-11-041-32/+179
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* drm/i915: split out intel_pcode.[ch] to separate fileJani Nikula2021-10-141-1/+1
* drm/i915: Update memory bandwidth parametersRadhakrishna Sripada2021-09-151-3/+16
* drm/i915: Implement PSF GV point supportStanislav Lisovskiy2021-07-271-4/+109
* drm/i915/dg2: DG2 has fixed memory bandwidthMatt Roper2021-07-221-1/+23
* drm/i915/dg1: Compute MEM Bandwidth using MCHBARClint Taylor2021-07-091-1/+40
* drm/i915: WA for zero memory channelJosé Roberto de Souza2021-05-251-1/+1
* drm/i915/adl_p: Update memory bandwidth parametersAnusha Srivatsa2021-05-191-1/+1
* drm/i915/xelpd: Required bandwidth increases when VT-d is activeMatt Roper2021-05-121-0/+3
* drm/i915: Polish for_each_dbuf_slice()Ville Syrjälä2021-04-211-5/+6
* drm/i915/display: rename display version macrosLucas De Marchi2021-04-141-4/+4
* drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper2021-03-231-5/+5
* drm/i915/display: support ddr5 mem typesClint Taylor2021-02-051-1/+11
* Merge tag 'topic/adl-s-enabling-2021-02-01-1' of git://anongit.freedesktop.or...Jani Nikula2021-02-021-1/+9
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| * drm/i915/adl_s: Update memory bandwidth parametersTejas Upadhyay2021-02-011-1/+9
* | drm/i915/gen11+: Only load DRAM information from pcodeJosé Roberto de Souza2021-01-291-72/+8
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* drm/i915: Fix wrong CDCLK adjustment changesStanislav Lisovskiy2020-06-041-19/+33
* drm/i915: Fix includes and local vars orderStanislav Lisovskiy2020-05-221-20/+24
* drm/i915: Adjust CDCLK accordingly to our DBuf bw needsStanislav Lisovskiy2020-05-211-2/+119
* drm/i915/rkl: Update memory bandwidth parametersMatt Roper2020-05-201-1/+9
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