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* MdeModulePkg/XhciDxe: Reset endpoint while USB Transaction errorXianglei Cai2024-05-071-1/+4
| | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4556 Based on XHCI spec 4.8.3, software should do the reset endpoint while USB Transaction occur. Add the error code for USB Transaction error since UEFI spec don't have the related definition. Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Krzysztof Lewandowski <krzysztof.lewandowski@intel.com> Cc: Jenny Huang <jenny.huang@intel.com> Cc: More Shih <more.shih@intel.com> Signed-off-by: Xianglei Cai <xianglei.cai@intel.com> Reviewed-by: Krzysztof Lewandowski <krzysztof.lewandowski@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/Xhci: Skip another size round up for TRB addressDat Mach2024-03-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4560 Commit f36e1ec1f0a5fd3be84913e09181d7813444b620 had fixed the DXE_ASSERT caused by the TRB size round up from 16 to 64 for most cases. However, there is a remaining case that the TRB size is also rounded up during setting TR dequeue pointer that would trigger DXE_ASSERT. This patch sets the alignment flag to FALSE in XhcSetTrDequeuePointer to fix this issue as well. Cc: Gao Cheng <gao.cheng@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Dat Mach <dmach@nvidia.com> Reviewed-by: Gao Cheng <gao.cheng@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/Xhci: Skip size round up for TRB during address translationGao Cheng2023-09-281-25/+29
| | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4560 TRB Template is 16 bytes. When boundary checking is 64 bytes for xHCI device/host memory address, it may exceed xHCI host memory pool and cause unwanted DXE_ASSERT. Introduce a new input parameter to indicate whether to enforce 64byte size alignment and round up. For TRB case, should set it to FALSE to skip the size round up. Signed-off-by: Gao Cheng <gao.cheng@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Abort the Address Device cmd when time outCai, Xianglei2023-09-251-0/+36
| | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4552 Following XHCI spec 4.6.1.2, software may abort the execution of Address Device Command when command failed due to timeout. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: More Shih <more.shih@intel.com> Cc: Jenny Huang <jenny.huang@intel.com> Signed-off-by: Xianglei Cai <xianglei.cai@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Use Performance Timer for XHCI TimeoutsHenz, Patrick2023-09-251-43/+29
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2948 XhciDxe uses the timer functionality provided by the boot services table to detect timeout conditions. This breaks the driver's ExitBootServices call back, as CoreExitBootServices halts the timer before signaling the ExitBootServices event. If the host controller fails to halt in the call back, the timeout condition will never occur and the boot gets stuck in an indefinite spin loop. Use the free running timer provided by TimerLib to calculate timeouts, avoiding the potential hang. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Patrick Henz <patrick.henz@hpe.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg: Solve boot hang Xhci driver when use USB DVD with empty disklikun su2023-08-041-2/+5
| | | | | | | Signed-off-by: likun su <sulikun@loongson.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: lichao <lichao@loongson.cn> Acked-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg: Update code to be more C11 compliant by using __func__Rebecca Cran2023-04-101-2/+2
| | | | | | | | | | | | __FUNCTION__ is a pre-standard extension that gcc and Visual C++ among others support, while __func__ was standardized in C99. Since it's more standard, replace __FUNCTION__ with __func__ throughout MdeModulePkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* MdeModulePkg/Xhci: Initial XHCI DCI slot's Context valueAbner Chang2023-01-161-0/+7
| | | | | | | | | | | | Initialize XHCI DCI slot's context entries value. Signed-off-by: Jiangang He <jiangang.he@amd.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Garrett Kirkendall <garrett.kirkendall@amd.com> Cc: Abner Chang <abner.chang@amd.com> Cc: Kuei-Hung Lin <Kuei-Hung.Lin@amd.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg: Put USB DEBUGs that occur for bulk timeouts under VERBOSERebecca Cran2022-12-081-3/+3
| | | | | | | | | | | | | | | With the pending commit of UsbNetworkPkg, it will become common for UsbBulkTransfer calls to timeout, given that the drivers are called from MnpSystemPoll every MNP_SYS_POLL_INTERVAL milliseconds: the drivers check for network packets by calling UsbBulkTransfer with a timeout of 1ms. Avoid console spam by moving DEBUG messages that occur each time a bulk transfer request times out from DEBUG_ERROR to DEBUG_VERBOSE, for both EHCI and XHCI drivers. Signed-off-by: Rebecca Cran <rebecca@quicinc.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Add boundary check for TRB ring allocationjdzhang2022-10-201-8/+8
| | | | | | | | | | | According the Xhci Spec, TRB Rings may be larger than a Page, however they shall not cross a 64K byte boundary, so add a parameter to indicate whether the memory allocation is for TRB Rings or not. It will ensure the allocation not crossing 64K boundary in UsbHcAllocMemFromBlock if the memory is allocated for TRB Rings. Signed-off-by: jdzhang <jdzhang@kunluntech.com.cn> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Input context update for Evaluate Context commandjdzhang2022-09-271-2/+12
| | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4074 Update XhcEvaluateContext/XhcEvaluateContext64 to properly initialize the input context for Evaluate Context command. Signed-off-by: jdzhang <jdzhang@kunluntech.com.cn> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg: Apply uncrustify changesMichael Kubacki2021-12-071-603/+667
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdeModulePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg: Change use of EFI_D_* to DEBUG_*Michael D Kinney2021-12-071-62/+60
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739 Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/XhciSched: Fix missing DEBUG argumentsMichael Kubacki2021-11-081-2/+2
| | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3662 Two DEBUG macros in XhciDxe/XhciSched.c are missing the argument that should be passed for the print specifier. In addition, this change updates the print level to "DEBUG_ERROR" and prints the status as well. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/Xhci: Fix TRT when data length is 0Wenyi Xie2021-06-021-4/+9
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3418 According to xhci spec, at USB packet level, a Control Transfer consists of multiple transactions partitioned into stages: a setup stage, an optional data stage, and a terminating status stage. If Data Stage does not exist, the Transfer Type flag(TRT) should be No Data Stage. So if data length equals to 0, TRT is set to 0. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Retry device slot init on failureJon Hunter2020-11-021-10/+24
| | | | | | | | | | | | | | | | | | | | | | | | | With some super-speed USB mass storage devices it has been observed that a USB transaction error may occur when attempting the set the device address during enumeration. According the the xHCI specification (section 4.6.5) ... "A USB Transaction ErrorCompletion Code for an Address Device Command may be due to a Stall response from a device. Software should issue a Disable Slot Commandfor the Device Slot then an Enable Slot Command to recover from this error." To fix this, retry the device slot initialization if it fails due to a device error. Change was verified using a superspeed mass storage device that was occasionally failing to enumerate in UEFI. With this change this failure to enumerate was resolved. This failure was also only seen in UEFI and not in the OS. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Error handle for USB slot initialization failureLuo, Heng2020-10-271-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3007 Currently UsbDevContext is not cleaned up if USB slot initialization is failed, the wrong context data will affect next USB devices and the USB devices can not be enumerated. Need to disable slot if USB slot initialization is failed. Below test cases are passed on UpXtreme: a. USB 3.0 thumb drives can be recognized in UEFI shell b. SUT can boot to Puppylinux from USB3.0 mass storage, the storage can be recognized in linux c. Plug in a USB keyboard (hot plug) and enumeration is OK in UEFI shell and linux d. Plug in a USB mouse(hot plug) and enumeration is OK in linux. Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Heng Luo <heng.luo@intel.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Fix Broken TimeoutsPatrick Henz2020-09-291-15/+48
| | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2948 Timeouts in the XhciDxe driver are taking longer than expected due to the timeout loops not accounting for code execution time. As en example, 5 second timeouts have been observed to take around 36 seconds to complete. Use SetTimer and Create/CheckEvent from Boot Services to determine when timeout occurred. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Patrick Henz <patrick.henz@hpe.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Use BaseLib linked list iteration macrosMichael Kubacki2020-04-211-4/+5
| | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959 Replaces usage of the linked list iteration macros defined in Xhci.h with the common definition in BaseLib.h. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* MdeModulePkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-091-7/+1
| | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* Revert "XhciDxe: Use common buffer for AsyncInterruptTransfer"Star Zeng2018-11-071-47/+91
| | | | | | | | | | | | There is concern at the thread https://lists.01.org/pipermail/edk2-devel/2018-November/031951.html. And the time point is a little sensitive as it is near edk2-stable201811. This reverts commit 777920997152a2e68f664241f6080b64ff21edd6. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg XhciDxe: Use common buffer for AsyncInterruptTransferStar Zeng2018-10-281-91/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V3: Call XhcFreeUrb after XhcCreateTransferTrb fails in XhcCreateTrb. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1274 In current code, XhcMonitorAsyncRequests (timer handler) will do unmap and map operations for AsyncIntTransfers to "Flush data from PCI controller specific address to mapped system memory address". XhcMonitorAsyncRequests XhcFlushAsyncIntMap PciIo->Unmap IoMmu->SetAttribute PciIo->Map IoMmu->SetAttribute This may impact the boot performance. Since the data buffer for XhcMonitorAsyncRequests is internal buffer, we can allocate common buffer by PciIo->AllocateBuffer and map the buffer with EfiPciIoOperationBusMasterCommonBuffer, then the unmap and map operations can be removed. /// /// Provides both read and write access to system memory by /// both the processor and a bus master. The buffer is coherent /// from both the processor's and the bus master's point of view. /// EfiPciIoOperationBusMasterCommonBuffer, Test done: USB KB works normally. USB disk read/write works normally. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* MdeModulePkg XhciDxe: Extract new XhciInsertAsyncIntTransfer functionStar Zeng2018-10-281-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | V3: Match function parameter name and description between XhciSched.c and XhciSched.h. V2: Add the missing "FreePool (Data);". Remove the unnecessary indentation change. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1274 Extract new XhciInsertAsyncIntTransfer function from XhcAsyncInterruptTransfer. It is code preparation for following patch, no essential functional change. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* MdeModulePkg/Usb: Make sure data from HW is no more than expectedRuiyu Ni2018-10-171-3/+6
| | | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg: Clean up source filesLiming Gao2018-06-281-20/+20
| | | | | | | | | | 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg XhciDxe: Fix Map and Unmap inconsistencyStar Zeng2017-08-251-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | We found there are loops of *2* Maps and only *1* Unmap and the DMA buffer address is decreasing. It is caused by the below code flow. XhcAsyncInterruptTransfer -> XhcCreateUrb -> XhcCreateTransferTrb -> Map Urb->DataMap (1) Timer: loops of *2* Maps and only *1* Unmap XhcMonitorAsyncRequests -> XhcFlushAsyncIntMap -> Unmap and Map Urb->DataMap (2) XhcUpdateAsyncRequest -> XhcCreateTransferTrb -> Map Urb->DataMap (3) This patch is to eliminate (3). Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg/XhciDxe: Make comments align with functionBi, Dandan2017-07-111-0/+1
| | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpointRuiyu Ni2017-07-051-11/+61
| | | | | | | | | | | This fixes BULK data loss when transfer is detected as timeout but finished just before stopping endpoint. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Feng Tian <feng.tian@intel.com>
* MdeModulePkg/XhciDxe: Dump the CMD/EVENT/INT/BULK ring informationRuiyu Ni2017-07-051-3/+24
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Feng Tian <feng.tian@intel.com>
* MdeModulePkg/XhciDxe: Refine IsTransferRingTrb and IsAsyncIntTrbRuiyu Ni2017-07-051-46/+44
| | | | | | | | | | | | | Current implementation of IsTransferRingTrb only checks whether the TRB is in the RING of the URB. The patch enhanced the logic to check that whether the TRB belongs to the transaction of URB. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Feng Tian <feng.tian@intel.com>
* MdeModulePkg/Xhci: Correct the indention of commentsRuiyu Ni2017-06-021-4/+4
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/Xhci: Remove TRB when canceling Async Int TransferRuiyu Ni2017-06-021-0/+21
| | | | | | | | | | | | Some USB devices don't report data periodically through Int Transfer. They report data only when be asked. If the TRB is not removed from the XHCI HW, when next time HOST asks data again, the data is reported but consumed by the previous TRB, which results the HOST thinks data never comes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/Xhci: Fill the 'interval' field for ISO endpoint contextHao Wu2017-06-011-1/+29
| | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=510 The commit fills the 'Interval' field of the Endpoint Context data for isochronous endpoints. It will resolve the error when a Configure Endpoint Command is sent to an isochronous endpoint. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/Xhci: Add 10ms delay before sending SendAddr cmd to devFeng Tian2016-11-241-1/+9
| | | | | | | | | | | | | | | | | | | | | | | We send ADDRESS DEVICE CMD in XhcInitializeDeviceSlot(), which will cause XHC issue a USB SET_ADDRESS request to the USB Device. According to USB spec, there should have a 10ms delay before this operation after resetting a given port. But in original code, there is a possible path which may have no such 10ms delay: UsbHubResetPort()->UsbHubSetPortFeature()->Stall(20)->UsbHubGetPortSt atus()->XhcPollPortStatusChange()->(if RESET_C bit is set)-> XhcInitializeDeviceSlot()->(if RESET_C bit is set)->Stall(10) So this patch is used to fix above issue. Cc: Star Zeng <star.zeng@intel.com> Cc: Baraneedharan Anbazhagan <anbazhagan@hp.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Tested-by: Baraneedharan Anbazhagan <anbazhagan@hp.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/Xhci: Change short packet debug message to verbose levelFeng Tian2016-11-011-1/+1
| | | | | | | | | Short Packet case is a normal case, we shouldn't print it as an error Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/XhciDxe: fix a bug on TRB check in async int transferFeng Tian2016-07-251-1/+5
| | | | | | | | | | | | | The last TRB in transfer ring is a LINK type TRB, which shouldn't be accounted as a valid item in IsAsyncIntTrb(). Without this fix, the original algo will bring issue on those URBs whose TRBs crosses the transfer ring. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/XhciDxe:Fix usb desc length check logicFeng Tian2016-06-291-2/+32
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Evgeny Yakovlev <insoreiges@gmail.com>
* MdeModulePkg/Xhci: Remove TDs from transfer ring when timeout happensFeng Tian2015-08-261-30/+163
| | | | | | | | | | | | | | | The error handling for timeout case is enhanced to remove TDs from transfer ring. The original code only removed s/w URB, but the h/w transfer descriptor TDs didn't get removed. It would cause data lost for data stream peripheral, such as usb-to-serial device, from the s/w perspective. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Baraneedharan Anbazhagan <anbazhagan@hp.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18313 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg/Xhci: make all timeout values be consistent with comments.Feng Tian2015-08-191-1/+1
| | | | | | | | | | | | | | | | | | | In the original code, there exists some mismatches between the real waiting time and the corresponding timeout comments. For example, the XHC_GENERIC_TIMEOUT comment says it's 10ms timeout value, but the real code in fact waits 10s. So the code is refined to be consistent in code logic and comments. Note XHC_POLL_DELAY macro also be removed and the polling interval in XhcWaitOpRegBit() is changed from 1ms to 1us to keep same code style with other code. It has no real functionality impact. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18235 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg/XhciDxe: Error handling enhancement for XhcExecTransferFeng Tian2015-07-081-5/+8
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Baraneedharan Anbazhagan <anbazhagan@hp.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17879 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg: fix completed xfer length in XhciDxe and XhciPei driversFeng Tian2015-04-271-1/+1
| | | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Baraneedharan Anbazhagan <anbazhagan@hp.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17207 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg/XhciDxe: rename "Lenth" to "Length" in TRB structsFeng Tian2015-04-271-6/+6
| | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Baraneedharan Anbazhagan <anbazhagan@hp.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17205 6f19259b-4bc3-4df7-8a09-765794883524
* Do not access transfer ring when endpoint is isochronous type and control ↵Elvin Li2014-08-221-6/+26
| | | | | | | | | | | | type. And when one Endpoint is a unknown type, do not ASSERT(0) and process next endpoint. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Elvin Li <elvin.li@intel.com> Signed-off-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15876 6f19259b-4bc3-4df7-8a09-765794883524
* 1) Add type cast for better coding style.Feng Tian2014-08-071-4/+4
| | | | | | | | | | | 2) replace StrCpy() usage in Variable driver with StrnCpy(). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15770 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg XhciDxe: Initialize ScratchPhy and ScratchEntryPhy in ↵Star Zeng2014-07-071-0/+2
| | | | | | | | | | XhcInitSched(). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15634 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg XhciDxe: XHCI multiple interface alternate setting support.Star Zeng2014-07-041-246/+769
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15617 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg/UsbBus&XhciDxe: Solve a bug that 2 or more tiers SS hubs with ↵Feng Tian2013-11-221-19/+21
| | | | | | | | | | | | | | | SS devices may have no response. 1.Port reset process may not be proper for some vendor's SS hubs. If the corresponding port shows the reset has been done by C_RESET bit we have to skip the whole reset process for attached devices. 2.Clean C_BH_RESET bit immediately to avoid usb timer entering too many times when 5 tiers hubs are connected. 3.Stop checking URB if there is an error happened. 4.Better error handling for fast hot-plug. Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Elvin Li <elvin.li@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14889 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg/XhciDxe: Dynamically calculate the interval value of interrupt ↵Tian, Feng2013-10-231-4/+6
| | | | | | | | | | endpoint context of low/full speed device behind low/full speed hub. Signed-off-by: Tian, Feng <feng.tian@intel.com> reviewed-by: Li, Elvin <elvin.li@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14797 6f19259b-4bc3-4df7-8a09-765794883524
* Remove several ASSERT in XhciDxe to allow error status happen then do error ↵Elvin Li2013-08-211-36/+58
| | | | | | | | | | handling. Signed-off-by: Elvin Li <elvin.li@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14574 6f19259b-4bc3-4df7-8a09-765794883524
* Update XHCI driver to use PCI IO AllocateBuffer/Map/Unmap to do DMA operation.Elvin Li2013-08-121-119/+345
| | | | | | | | Signed-off-by: Elvin Li <elvin.li@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14546 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-01 17:18:11 +0000