coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/amd/cezanne: Turn off gpp clock request for disabled devices	Robert Zieba	2022-03-23	1	-5/+7
*	soc/amd/*/i2c: factor out common I2C pad configuration	Felix Held	2022-02-03	1	-1/+2
*	soc/amd/cezanne: FSP: Add UPD entry for eDP tuning	Zheng Bao	2022-01-25	1	-0/+13
*	soc/amd/*/chip.h: add missing gpio.h include	Felix Held	2022-01-13	1	-0/+1
*	soc/amd/*/chip.h: Correct PSPP Enum Value	Matt Papageorge	2021-07-24	1	-1/+2
*	soc/amd/cezanne: Configure I2C Pad RX Select through devicetree	Karthikeyan Ramasubramanian	2021-06-07	1	-0/+1
*	soc/amd/cezanne: add devicetree setting for PSPP policy	Felix Held	2021-05-27	1	-0/+7
*	soc/amd/cezanne: add support for the changed AMD FSP API for USB PHY	Julian Schroeder	2021-05-26	1	-0/+4
*	soc/amd/cezanne/fch: add PCIe GPP clock generator configuration settings	Felix Held	2021-05-19	1	-0/+9
*	soc/amd/cezanne/chip.h: add DPTC and tablet mode options	Felix Held	2021-05-12	1	-0/+8
*	amd/cezanne: Add telemetry setting to UPD	Chris Wang	2021-04-30	1	-0/+7
*	soc/amd/cezanne: Update STAPM vars with units	Martin Roth	2021-04-26	1	-4/+4
*	amd/cezanne: Add slow_ppt_time & thermctl_limit to UPD	Martin Roth	2021-04-26	1	-0/+2
*	soc/amd/cezanne: add SMU settings to devicetree	Felix Held	2021-04-21	1	-0/+39
*	soc/amd/cezanne: add downcoring and SMT disable settings to devicetree	Felix Held	2021-04-21	1	-0/+12
*	soc/amd/cezanne/chip.h: include missing types.h	Felix Held	2021-04-21	1	-0/+1
*	soc/amd/cezanne: Add modern standby option to chip config	Mathew King	2021-04-16	1	-0/+3
*	soc/amd/cezanne: Get I2C specific code for cezanne	Zheng Bao	2021-03-22	1	-0/+4
*	soc/amd/cezanne: add config.c and minimal chip.h	Felix Held	2020-12-06	1	-0/+12