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* soc/intel/alderlake: Align board type as per FSP v2347_00Ronak Kanabar2021-09-101-1/+2
* soc/intel/alderlake: Switch to runtime generation of Intel Power EngineTim Wawrzynczak2021-09-103-3/+16
* soc/intel/alderlake: Set LpmStateEnableMask UPDTim Wawrzynczak2021-09-104-0/+35
* soc/intel/alderlake: Add get_adl_cpu_type functionTim Wawrzynczak2021-09-102-0/+66
* soc/intel/alderlake: Change VBOOT_HASH_BLOCK_SIZE to 4 KiBMAULIK V VAGHELA2021-09-091-0/+7
* soc/intel/alderlake: Enable Irms UPD for ADLRonak Kanabar2021-09-091-4/+7
* cpu/x86/tsc: Deduplicate Makefile logicAngel Pons2021-09-081-1/+0
* soc/intel/adl: Move USB4 hotplug Kconfig to commonFurquan Shaikh2021-09-061-6/+2
* soc/intel/alderlake: Add tpch device information under dptfSumeet Pawnikar2021-09-051-0/+6
* soc/intel/alderlake: set power limits dynamically for thermalSumeet Pawnikar2021-09-033-33/+57
* soc/intel/alderlake: Fix processor hang while plug unplug of TBT deviceSugnan Prabhu S2021-09-012-7/+10
* soc/intel/alderlake: Lock PAM registers in finalizeTim Wawrzynczak2021-08-262-0/+10
* soc/intel/adl: Update power limits for ADL-M SKUSumeet Pawnikar2021-08-203-0/+10
* soc/intel/adl: Update PCI ID for ADL-M SKUSumeet Pawnikar2021-08-201-1/+1
* soc/intel/alderlake: Move INTEL_CAR_NEM selection from SoC to mainboardSubrata Banik2021-08-191-1/+0
* soc/intel/alderlake: set default PL4 values for different SKUsSumeet Pawnikar2021-08-191-0/+4
* soc/intel/alderlake: Create eNEM Kconfig for Alder LakeSubrata Banik2021-08-161-0/+8
* soc/intel/alderlake: Clean up FSP chipset lockdown configurationFelix Singer2021-08-121-11/+5
* soc/intel/alderlake: Configure the SKU specific parameters for VR domainsV Sowmya2021-08-125-0/+198
* soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADLV Sowmya2021-08-121-0/+34
* soc/intel/alderlake: Implement report_cache_info() functionSubrata Banik2021-08-111-0/+18
* mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cbMAULIK V VAGHELA2021-08-101-0/+2
* soc/intel/alderlake: Add GFx Device ID 0x46aaBora Guvendik2021-08-051-0/+1
* Move post_codes.h to commonlib/console/Ricardo Quesada2021-08-041-3/+3
* soc/intel/*: Allow configuring 8254 timer via CMOSSean Rhodes2021-08-031-2/+5
* util/spd_tools/lp4x: Add new memory parts and generate SPDsDavid Wu2021-07-281-0/+4
* src/*: Specify type of `CBFS_SIZE` onceAngel Pons2021-07-261-1/+0
* soc/intel/alderlake: Add support for I2C6 and I2C7Varshit B Pandya2021-07-206-1/+27
* soc/intel/common: Rename kconfig PMC_EPOCLean Sheng Tan2021-07-191-1/+1
* soc/intel/alderlake: Select INTEL_GMA_OPREGION_2_1Meera Ravindranath2021-07-171-0/+1
* soc/intel/alderlake: Make use of `cpu/intel/cpu_ids.h'Subrata Banik2021-07-173-3/+1
* soc/intel/alderlake: Add virtual GPIOs for community 1Maulik V Vaghela2021-07-152-223/+281
* soc/intel/alderlake: Use `is_devfn_enabled()` for Crashlog UPDsSubrata Banik2021-07-151-4/+2
* soc/intel/alderlake: Add GFx Device ID 0x46a6Maulik V Vaghela2021-07-141-0/+1
* soc/intel/alderlake: Implement WA for DDR5 DIMM modulesMeera Ravindranath2021-07-131-0/+27
* soc/intel/alderlake: Add (and fix) devices in IRQ tableTim Wawrzynczak2021-07-131-6/+51
* soc/intel/alderlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 8KBSubrata Banik2021-07-121-1/+1
* soc/intel/alderlake: Add missing devices to pci_devs.hTim Wawrzynczak2021-07-121-0/+26
* soc/intel/alderlake: Set max Pkg C-states to AutoV Sowmya2021-07-122-0/+19
* soc/intel/alderlake: Avoid NULL pointer deferenceJohn Zhao2021-07-081-4/+4
* soc/intel/alderlake: Add support to update the FIVR configsV Sowmya2021-07-052-0/+89
* soc/intel/alderlake: Correct Bus and Device of Touch Host ControllerVarshit B Pandya2021-07-052-6/+6
* src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons2021-07-021-1/+0
* soc/intel/alderlake: Add USB TCSS enablementBernardo Perez Priego2021-07-021-0/+14
* soc/intel/alderlake: Enable energy efficiency turbo modeV Sowmya2021-07-011-0/+2
* soc/intel: Refactor `xdci_can_enable()` functionAngel Pons2021-07-011-4/+1
* soc/intel/alderlake: Select VBOOT_X86_SHA256_ACCELERATION configSubrata Banik2021-07-011-0/+1
* soc/intel/alderlake: Send End-of-Post message to CSETim Wawrzynczak2021-06-302-1/+16
* soc/intel/common: Move PMC EPOC related code to Intel common codeLean Sheng Tan2021-06-304-32/+1
* src: Move `select ARCH_X86` to platformsAngel Pons2021-06-301-0/+1
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