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linux-stable.git
linux-2.6.11.y
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linux-2.6.14.y
linux-2.6.15.y
linux-2.6.16.y
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linux-2.6.22.y
linux-2.6.23.y
linux-2.6.24.y
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linux-2.6.26.y
linux-2.6.27.y
linux-2.6.28.y
linux-2.6.29.y
linux-2.6.30.y
linux-2.6.31.y
linux-2.6.32.y
linux-2.6.33.y
linux-2.6.34.y
linux-2.6.35.y
linux-2.6.36.y
linux-2.6.37.y
linux-2.6.38.y
linux-2.6.39.y
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linux-3.15.y
linux-3.16.y
linux-3.17.y
linux-3.18.y
linux-3.19.y
linux-3.2.y
linux-3.3.y
linux-3.4.y
linux-3.5.y
linux-3.6.y
linux-3.7.y
linux-3.8.y
linux-3.9.y
linux-4.0.y
linux-4.1.y
linux-4.10.y
linux-4.11.y
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linux-4.13.y
linux-4.14.y
linux-4.15.y
linux-4.16.y
linux-4.17.y
linux-4.18.y
linux-4.19.y
linux-4.2.y
linux-4.20.y
linux-4.3.y
linux-4.4.y
linux-4.5.y
linux-4.6.y
linux-4.7.y
linux-4.8.y
linux-4.9.y
linux-5.0.y
linux-5.1.y
linux-5.10.y
linux-5.11.y
linux-5.12.y
linux-5.13.y
linux-5.14.y
linux-5.15.y
linux-5.16.y
linux-5.17.y
linux-5.18.y
linux-5.19.y
linux-5.2.y
linux-5.3.y
linux-5.4.y
linux-5.5.y
linux-5.6.y
linux-5.7.y
linux-5.8.y
linux-5.9.y
linux-6.0.y
linux-6.1.y
linux-6.10.y
linux-6.2.y
linux-6.3.y
linux-6.4.y
linux-6.5.y
linux-6.6.y
linux-6.7.y
linux-6.8.y
linux-6.9.y
linux-rolling-lts
linux-rolling-stable
master
Linux kernel stable tree
Greg Kroah-Hartman
summary
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log
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commit
diff
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author
committer
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path:
root
/
drivers
/
clk
/
renesas
Commit message (
Expand
)
Author
Age
Files
Lines
*
clk: renesas: r9a06g032: Improve readability
Ralph Siemsen
2023-03-10
1
-41
/
+80
*
clk: renesas: r8a77980: Add Z2 clock
Geert Uytterhoeven
2023-03-10
1
-0
/
+1
*
clk: renesas: r8a77970: Add Z2 clock
Geert Uytterhoeven
2023-03-10
1
-0
/
+1
*
clk: renesas: r8a77995: Fix VIN parent clock
Geert Uytterhoeven
2023-03-06
1
-1
/
+1
*
clk: renesas: r8a77980: Add VIN clocks
Niklas Söderlund
2023-03-06
1
-0
/
+16
*
clk: renesas: r8a779g0: Add VIN clocks
Niklas Söderlund
2023-03-06
1
-0
/
+16
*
clk: renesas: r8a779g0: Add ISPCS clocks
Niklas Söderlund
2023-03-06
1
-0
/
+2
*
clk: renesas: r8a779g0: Add CSI-2 clocks
Niklas Söderlund
2023-03-06
1
-0
/
+3
*
clk: renesas: r8a779g0: Add thermal clock
Geert Uytterhoeven
2023-03-06
1
-0
/
+1
*
clk: renesas: r8a779g0: Add Audio clocks
Kuninori Morimoto
2023-03-06
1
-0
/
+2
*
clk: renesas: cpg-mssr: Update MSSR register range for R-Car V4H
Takeshi Kihara
2023-03-06
1
-4
/
+4
*
clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*
Wolfram Sang
2023-02-10
5
-173
/
+13
*
clk: renesas: r8a779g0: Add CAN-FD clocks
Geert Uytterhoeven
2023-01-26
1
-0
/
+2
*
clk: renesas: r8a779g0: Tidy up DMAC name on SYS-DMAC
Kuninori Morimoto
2023-01-26
1
-2
/
+2
*
clk: renesas: r8a779a0: Tidy up DMAC name on SYS-DMAC
Kuninori Morimoto
2023-01-26
1
-2
/
+2
*
clk: renesas: r8a779g0: Add custom clock for PLL2
Geert Uytterhoeven
2023-01-24
3
-7
/
+164
*
clk: renesas: cpg-mssr: Remove superfluous check in resume code
Geert Uytterhoeven
2023-01-23
1
-3
/
+2
*
clk: renesas: r9a06g032: Handle h2mode setting based on USBF presence
Herve Codina
2023-01-23
1
-0
/
+28
*
clk: renesas: cpg-mssr: Fix use after free if cpg_mssr_common_init() failed
Alexey Khoroshilov
2023-01-12
1
-1
/
+2
*
clk: renesas: r9a07g044: Add clock and reset entries for CRU
Lad Prabhakar
2023-01-12
1
-1
/
+25
*
clk: renesas: r9a09g011: Add SDHI/eMMC clock and reset entries
Phil Edworthy
2022-12-27
1
-0
/
+20
*
clk: renesas: r9a09g011: Add USB clock and reset entries
Biju Das
2022-12-27
1
-0
/
+21
*
clk: renesas: r9a09g011: Add TIM clock and reset entries
Biju Das
2022-12-27
1
-0
/
+22
*
clk: renesas: r8a779g0: Add display related clocks
Tomi Valkeinen
2022-12-26
1
-0
/
+9
*
clk: renesas: rcar-gen4: Restore PLL enum sort order
Geert Uytterhoeven
2022-12-26
1
-1
/
+1
*
clk: renesas: r8a779g0: Fix OSC predividers
Geert Uytterhoeven
2022-12-26
1
-4
/
+4
*
clk: renesas: r9a09g011: Add PWM clock and reset entries
Biju Das
2022-12-26
1
-0
/
+10
*
clk: renesas: r8a779f0: Fix Ethernet Switch clocks
Geert Uytterhoeven
2022-11-16
1
-2
/
+2
*
clk: renesas: r8a779g0: Add Z0 clock support
Geert Uytterhoeven
2022-11-15
1
-0
/
+1
*
clk: renesas: r8a779g0: Add CMT clocks
Wolfram Sang
2022-11-08
1
-0
/
+4
*
clk: renesas: r8a779g0: Add TMU and SASYNCRT clocks
Wolfram Sang
2022-11-08
1
-0
/
+6
*
clk: renesas: r8a779f0: Fix SCIF parent clocks
Wolfram Sang
2022-11-08
1
-4
/
+4
*
clk: renesas: r8a779f0: Fix HSCIF parent clocks
Wolfram Sang
2022-11-08
1
-4
/
+4
*
clk: renesas: r9a06g032: Repair grave increment error
Marek Vasut
2022-11-01
1
-2
/
+1
*
clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM
Lad Prabhakar
2022-10-28
2
-15
/
+28
*
clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldoc
Lad Prabhakar
2022-10-26
1
-1
/
+1
*
clk: renesas: r8a779a0: Fix SD0H clock name
Wolfram Sang
2022-10-26
1
-1
/
+1
*
clk: renesas: r8a779g0: Add RPC-IF clock
Geert Uytterhoeven
2022-10-26
1
-1
/
+2
*
clk: renesas: r8a779g0: Add SDHI clocks
Geert Uytterhoeven
2022-10-26
1
-1
/
+3
*
clk: renesas: r8a779f0: Add SASYNCPER internal clock
Geert Uytterhoeven
2022-10-26
1
-3
/
+5
*
clk: renesas: r8a779f0: Fix SD0H clock name
Geert Uytterhoeven
2022-10-26
1
-1
/
+1
*
clk: renesas: r9a07g043: Drop WDT2 clock and reset entry
Lad Prabhakar
2022-10-26
1
-5
/
+0
*
clk: renesas: r9a07g044: Drop WDT2 clock and reset entry
Lad Prabhakar
2022-10-26
1
-6
/
+1
*
clk: renesas: r8a779g0: Add TPU clock
Geert Uytterhoeven
2022-10-26
1
-0
/
+1
*
clk: renesas: r8a779g0: Add PWM clock
Geert Uytterhoeven
2022-10-26
1
-0
/
+1
*
clk: renesas: r8a779g0: Add SCIF clocks
Geert Uytterhoeven
2022-10-26
1
-0
/
+4
*
Merge tag 'renesas-clk-fixes-for-v6.1-tag1'
Geert Uytterhoeven
2022-10-26
1
-4
/
+9
|
\
|
*
clk: renesas: r8a779g0: Fix HSCIF parent clocks
Geert Uytterhoeven
2022-10-26
1
-4
/
+4
|
*
clk: renesas: r8a779g0: Add SASYNCPER clocks
Geert Uytterhoeven
2022-10-18
1
-0
/
+5
*
|
clk: renesas: r9a07g044: Add MTU3a clock and reset entry
Biju Das
2022-10-17
1
-1
/
+4
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